18 lines
424 B
Plaintext
18 lines
424 B
Plaintext
* ARC HS Performance Counters
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The ARC HS can be configured with a pipeline performance monitor for counting
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CPU and cache events like cache misses and hits. Like conventional PCT there
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are 100+ hardware conditions dynamically mapped to up to 32 counters.
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It also supports overflow interrupts.
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Required properties:
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- compatible : should contain
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"snps,archs-pct"
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Example:
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pmu {
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compatible = "snps,archs-pct";
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};
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