67 lines
1.9 KiB
Plaintext
67 lines
1.9 KiB
Plaintext
device-tree bindings for rockchip soc display controller (vop)
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VOP (Visual Output Processor) is the Display Controller for the Rockchip
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series of SoCs which transfers the image data from a video memory
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buffer to an external LCD interface.
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Required properties:
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- compatible: value should be one of the following
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"rockchip,rk3036-vop";
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"rockchip,rk3126-vop";
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"rockchip,rk3288-vop";
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"rockchip,rk3368-vop";
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"rockchip,rk3366-vop";
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"rockchip,rk3399-vop-big";
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"rockchip,rk3399-vop-lit";
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"rockchip,rk3228-vop";
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"rockchip,rk3328-vop";
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- interrupts: should contain a list of all VOP IP block interrupts in the
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order: VSYNC, LCD_SYSTEM. The interrupt specifier
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format depends on the interrupt controller used.
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- clocks: must include clock specifiers corresponding to entries in the
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clock-names property.
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- clock-names: Must contain
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aclk_vop: for ddr buffer transfer.
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hclk_vop: for ahb bus to R/W the phy regs.
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dclk_vop: pixel clock.
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- resets: Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names: Must include the following entries:
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- axi
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- ahb
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- dclk
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- iommus: required a iommu node
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- port: A port node with endpoint definitions as defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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Example:
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SoC specific DT entry:
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vopb: vopb@ff930000 {
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compatible = "rockchip,rk3288-vop";
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reg = <0xff930000 0x19c>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
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clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
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resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
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reset-names = "axi", "ahb", "dclk";
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iommus = <&vopb_mmu>;
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vopb_out: port {
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#address-cells = <1>;
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#size-cells = <0>;
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vopb_out_edp: endpoint@0 {
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reg = <0>;
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remote-endpoint=<&edp_in_vopb>;
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};
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vopb_out_hdmi: endpoint@1 {
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reg = <1>;
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remote-endpoint=<&hdmi_in_vopb>;
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};
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};
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};
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