153 lines
4.7 KiB
Plaintext
153 lines
4.7 KiB
Plaintext
* Qualcomm Atheros ath10k wireless devices
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Required properties:
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- compatible: Should be one of the following:
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* "qcom,ath10k"
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* "qcom,ipq4019-wifi"
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* "qcom,wcn3990-wifi"
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PCI based devices uses compatible string "qcom,ath10k" and takes calibration
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data along with board specific data via "qcom,ath10k-calibration-data".
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Rest of the properties are not applicable for PCI based devices.
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AHB based devices (i.e. ipq4019) uses compatible string "qcom,ipq4019-wifi"
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and also uses most of the properties defined in this doc (except
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"qcom,ath10k-calibration-data"). It uses "qcom,ath10k-pre-calibration-data"
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to carry pre calibration data.
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In general, entry "qcom,ath10k-pre-calibration-data" and
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"qcom,ath10k-calibration-data" conflict with each other and only one
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can be provided per device.
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SNOC based devices (i.e. wcn3990) uses compatible string "qcom,wcn3990-wifi".
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Optional properties:
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- reg: Address and length of the register set for the device.
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- reg-names: Must include the list of following reg names,
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"membase"
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- resets: Must contain an entry for each entry in reset-names.
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See ../reset/reseti.txt for details.
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- reset-names: Must include the list of following reset names,
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"wifi_cpu_init"
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"wifi_radio_srif"
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"wifi_radio_warm"
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"wifi_radio_cold"
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"wifi_core_warm"
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"wifi_core_cold"
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- clocks: List of clock specifiers, must contain an entry for each required
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entry in clock-names.
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- clock-names: Should contain the clock names "wifi_wcss_cmd", "wifi_wcss_ref",
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"wifi_wcss_rtc".
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- interrupts: List of interrupt lines. Must contain an entry
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for each entry in the interrupt-names property.
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- interrupt-names: Must include the entries for MSI interrupt
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names ("msi0" to "msi15") and legacy interrupt
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name ("legacy"),
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- qcom,msi_addr: MSI interrupt address.
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- qcom,msi_base: Base value to add before writing MSI data into
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MSI address register.
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- qcom,ath10k-calibration-variant: string to search for in the board-2.bin
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variant list with the same bus and device
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specific ids
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- qcom,ath10k-calibration-data : calibration data + board specific data
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as an array, the length can vary between
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hw versions.
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- qcom,ath10k-pre-calibration-data : pre calibration data as an array,
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the length can vary between hw versions.
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- <supply-name>-supply: handle to the regulator device tree node
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optional "supply-name" is "vdd-0.8-cx-mx".
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Example (to supply the calibration data alone):
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In this example, the node is defined as child node of the PCI controller.
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pci {
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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ath10k@0,0 {
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reg = <0 0 0 0 0>;
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device_type = "pci";
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qcom,ath10k-calibration-data = [ 01 02 03 ... ];
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};
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};
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};
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Example (to supply ipq4019 SoC wifi block details):
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wifi0: wifi@a000000 {
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compatible = "qcom,ipq4019-wifi";
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reg = <0xa000000 0x200000>;
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resets = <&gcc WIFI0_CPU_INIT_RESET>,
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<&gcc WIFI0_RADIO_SRIF_RESET>,
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<&gcc WIFI0_RADIO_WARM_RESET>,
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<&gcc WIFI0_RADIO_COLD_RESET>,
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<&gcc WIFI0_CORE_WARM_RESET>,
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<&gcc WIFI0_CORE_COLD_RESET>;
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reset-names = "wifi_cpu_init",
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"wifi_radio_srif",
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"wifi_radio_warm",
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"wifi_radio_cold",
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"wifi_core_warm",
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"wifi_core_cold";
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clocks = <&gcc GCC_WCSS2G_CLK>,
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<&gcc GCC_WCSS2G_REF_CLK>,
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<&gcc GCC_WCSS2G_RTC_CLK>;
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clock-names = "wifi_wcss_cmd",
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"wifi_wcss_ref",
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"wifi_wcss_rtc";
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interrupts = <0 0x20 0x1>,
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<0 0x21 0x1>,
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<0 0x22 0x1>,
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<0 0x23 0x1>,
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<0 0x24 0x1>,
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<0 0x25 0x1>,
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<0 0x26 0x1>,
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<0 0x27 0x1>,
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<0 0x28 0x1>,
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<0 0x29 0x1>,
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<0 0x2a 0x1>,
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<0 0x2b 0x1>,
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<0 0x2c 0x1>,
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<0 0x2d 0x1>,
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<0 0x2e 0x1>,
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<0 0x2f 0x1>,
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<0 0xa8 0x0>;
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interrupt-names = "msi0", "msi1", "msi2", "msi3",
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"msi4", "msi5", "msi6", "msi7",
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"msi8", "msi9", "msi10", "msi11",
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"msi12", "msi13", "msi14", "msi15",
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"legacy";
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qcom,msi_addr = <0x0b006040>;
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qcom,msi_base = <0x40>;
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qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ];
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};
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Example (to supply wcn3990 SoC wifi block details):
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wifi@18000000 {
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compatible = "qcom,wcn3990-wifi";
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reg = <0x18800000 0x800000>;
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reg-names = "membase";
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clocks = <&clock_gcc clk_aggre2_noc_clk>;
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clock-names = "smmu_aggre2_noc_clk"
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interrupts =
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<0 130 0 /* CE0 */ >,
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<0 131 0 /* CE1 */ >,
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<0 132 0 /* CE2 */ >,
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<0 133 0 /* CE3 */ >,
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<0 134 0 /* CE4 */ >,
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<0 135 0 /* CE5 */ >,
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<0 136 0 /* CE6 */ >,
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<0 137 0 /* CE7 */ >,
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<0 138 0 /* CE8 */ >,
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<0 139 0 /* CE9 */ >,
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<0 140 0 /* CE10 */ >,
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<0 141 0 /* CE11 */ >;
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vdd-0.8-cx-mx-supply = <&pm8998_l5>;
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};
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