6db4831e98
Android 14
45 lines
1.3 KiB
Plaintext
45 lines
1.3 KiB
Plaintext
Allwinner A31/H3 SPI controller
|
|
|
|
Required properties:
|
|
- compatible: Should be "allwinner,sun6i-a31-spi" or "allwinner,sun8i-h3-spi".
|
|
- reg: Should contain register location and length.
|
|
- interrupts: Should contain interrupt.
|
|
- clocks: phandle to the clocks feeding the SPI controller. Two are
|
|
needed:
|
|
- "ahb": the gated AHB parent clock
|
|
- "mod": the parent module clock
|
|
- clock-names: Must contain the clock names described just above
|
|
- resets: phandle to the reset controller asserting this device in
|
|
reset
|
|
|
|
Optional properties:
|
|
- dmas: DMA specifiers for rx and tx dma. See the DMA client binding,
|
|
Documentation/devicetree/bindings/dma/dma.txt
|
|
- dma-names: DMA request names should include "rx" and "tx" if present.
|
|
|
|
Example:
|
|
|
|
spi1: spi@1c69000 {
|
|
compatible = "allwinner,sun6i-a31-spi";
|
|
reg = <0x01c69000 0x1000>;
|
|
interrupts = <0 66 4>;
|
|
clocks = <&ahb1_gates 21>, <&spi1_clk>;
|
|
clock-names = "ahb", "mod";
|
|
resets = <&ahb1_rst 21>;
|
|
};
|
|
|
|
spi0: spi@1c68000 {
|
|
compatible = "allwinner,sun8i-h3-spi";
|
|
reg = <0x01c68000 0x1000>;
|
|
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
|
|
clock-names = "ahb", "mod";
|
|
dmas = <&dma 23>, <&dma 23>;
|
|
dma-names = "rx", "tx";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi0_pins>;
|
|
resets = <&ccu RST_BUS_SPI0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|