82 lines
1.5 KiB
C
82 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* setup.c - boot time setup code
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*/
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#include <linux/init.h>
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#include <linux/export.h>
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#include <asm/bootinfo.h>
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#include <asm/reboot.h>
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#include <asm/time.h>
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#include <linux/ioport.h>
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#include <asm/mach-rc32434/rb.h>
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#include <asm/mach-rc32434/pci.h>
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struct pci_reg __iomem *pci_reg;
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EXPORT_SYMBOL(pci_reg);
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static struct resource pci0_res[] = {
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{
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.name = "pci_reg0",
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.start = PCI0_BASE_ADDR,
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.end = PCI0_BASE_ADDR + sizeof(struct pci_reg),
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.flags = IORESOURCE_MEM,
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}
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};
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static void rb_machine_restart(char *command)
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{
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/* just jump to the reset vector */
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writel(0x80000001, IDT434_REG_BASE + RST);
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((void (*)(void)) KSEG1ADDR(0x1FC00000u))();
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}
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static void rb_machine_halt(void)
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{
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for (;;)
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continue;
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}
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void __init plat_mem_setup(void)
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{
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u32 val;
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_machine_restart = rb_machine_restart;
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_machine_halt = rb_machine_halt;
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pm_power_off = rb_machine_halt;
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set_io_port_base(KSEG1);
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pci_reg = ioremap_nocache(pci0_res[0].start,
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pci0_res[0].end - pci0_res[0].start);
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if (!pci_reg) {
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printk(KERN_ERR "Could not remap PCI registers\n");
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return;
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}
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val = __raw_readl(&pci_reg->pcic);
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val &= 0xFFFFFF7;
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__raw_writel(val, (void *)&pci_reg->pcic);
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#ifdef CONFIG_PCI
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/* Enable PCI interrupts in EPLD Mask register */
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*epld_mask = 0x0;
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*(epld_mask + 1) = 0x0;
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#endif
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write_c0_wired(0);
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}
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const char *get_system_type(void)
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{
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switch (mips_machtype) {
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case MACH_MIKROTIK_RB532A:
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return "Mikrotik RB532A";
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break;
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default:
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return "Mikrotik RB532";
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break;
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}
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}
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