192 lines
4.8 KiB
C
192 lines
4.8 KiB
C
/*
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* Board setup routines for the Emerson KSI8560
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*
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* Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
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*
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* Based on mpc85xx_ads.c maintained by Kumar Gala
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*
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* 2008 (c) MontaVista, Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/of_platform.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpic.h>
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#include <mm/mmu_decl.h>
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#include <asm/udbg.h>
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#include <asm/prom.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include <asm/cpm2.h>
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#include <sysdev/cpm2_pic.h>
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#include "mpc85xx.h"
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#define KSI8560_CPLD_HVR 0x04 /* Hardware Version Register */
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#define KSI8560_CPLD_PVR 0x08 /* PLD Version Register */
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#define KSI8560_CPLD_RCR1 0x30 /* Reset Command Register 1 */
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#define KSI8560_CPLD_RCR1_CPUHR 0x80 /* CPU Hard Reset */
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static void __iomem *cpld_base = NULL;
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static void __noreturn machine_restart(char *cmd)
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{
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if (cpld_base)
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out_8(cpld_base + KSI8560_CPLD_RCR1, KSI8560_CPLD_RCR1_CPUHR);
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else
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printk(KERN_ERR "Can't find CPLD base, hang forever\n");
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for (;;);
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}
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static void __init ksi8560_pic_init(void)
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{
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struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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mpc85xx_cpm2_pic_init();
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}
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#ifdef CONFIG_CPM2
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/*
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* Setup I/O ports
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*/
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struct cpm_pin {
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int port, pin, flags;
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};
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static struct cpm_pin __initdata ksi8560_pins[] = {
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/* SCC1 */
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{3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* SCC2 */
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{3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* FCC1 */
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{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
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{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
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{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
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{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
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{2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK9 */
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{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK10 */
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};
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static void __init init_ioports(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(ksi8560_pins); i++) {
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struct cpm_pin *pin = &ksi8560_pins[i];
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cpm2_set_pin(pin->port, pin->pin, pin->flags);
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}
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cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
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}
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#endif
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/*
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* Setup the architecture
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*/
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static void __init ksi8560_setup_arch(void)
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{
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struct device_node *cpld;
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cpld = of_find_compatible_node(NULL, NULL, "emerson,KSI8560-cpld");
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if (cpld)
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cpld_base = of_iomap(cpld, 0);
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else
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printk(KERN_ERR "Can't find CPLD in device tree\n");
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if (ppc_md.progress)
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ppc_md.progress("ksi8560_setup_arch()", 0);
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#ifdef CONFIG_CPM2
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cpm2_reset();
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init_ioports();
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#endif
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}
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static void ksi8560_show_cpuinfo(struct seq_file *m)
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{
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uint pvid, svid, phid1;
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pvid = mfspr(SPRN_PVR);
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svid = mfspr(SPRN_SVR);
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seq_printf(m, "Vendor\t\t: Emerson Network Power\n");
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seq_printf(m, "Board\t\t: KSI8560\n");
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if (cpld_base) {
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seq_printf(m, "Hardware rev\t: %d\n",
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in_8(cpld_base + KSI8560_CPLD_HVR));
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seq_printf(m, "CPLD rev\t: %d\n",
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in_8(cpld_base + KSI8560_CPLD_PVR));
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} else
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seq_printf(m, "Unknown Hardware and CPLD revs\n");
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seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
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seq_printf(m, "SVR\t\t: 0x%x\n", svid);
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/* Display cpu Pll setting */
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phid1 = mfspr(SPRN_HID1);
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seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
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}
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machine_device_initcall(ksi8560, mpc85xx_common_publish_devices);
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init ksi8560_probe(void)
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{
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return of_machine_is_compatible("emerson,KSI8560");
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}
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define_machine(ksi8560) {
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.name = "KSI8560",
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.probe = ksi8560_probe,
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.setup_arch = ksi8560_setup_arch,
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.init_IRQ = ksi8560_pic_init,
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.show_cpuinfo = ksi8560_show_cpuinfo,
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.get_irq = mpic_get_irq,
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.restart = machine_restart,
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.calibrate_decr = generic_calibrate_decr,
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};
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