6db4831e98
Android 14
81 lines
2.4 KiB
C
81 lines
2.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2015 MediaTek Inc.
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*/
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#ifndef __CMDQ_DEVICE_H__
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#define __CMDQ_DEVICE_H__
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#include <linux/platform_device.h>
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#include <linux/device.h>
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#include "cmdq_def.h"
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#include "cmdq_mdp_common.h"
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#include <linux/clk.h>
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#define DECLARE_ENABLE_HW_CLOCK(HW_NAME) \
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u32 cmdq_dev_enable_clock_##HW_NAME(bool enable)
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DECLARE_ENABLE_HW_CLOCK(SMI_COMMON);
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DECLARE_ENABLE_HW_CLOCK(SMI_LARB0);
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#ifdef CMDQ_USE_LEGACY
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DECLARE_ENABLE_HW_CLOCK(MUTEX_32K);
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#endif
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#undef DECLARE_ENABLE_HW_CLOCK
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void cmdq_dev_get_module_clock_by_name(const char *ref_name,
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const char *clkName, struct clk **clk_module);
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u32 cmdq_dev_enable_device_clock(bool enable, struct clk *clk_module,
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const char *clkName);
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bool cmdq_dev_device_clock_is_enable(struct clk *clk_module);
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/* For test case used */
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void testcase_clkmgr_impl(enum CMDQ_ENG_ENUM engine,
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char *name, const unsigned long testWriteReg,
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const u32 testWriteValue,
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const unsigned long testReadReg, const bool verifyWriteResult);
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struct device *cmdq_dev_get(void);
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/* interrupt index */
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u32 cmdq_dev_get_irq_id(void);
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u32 cmdq_dev_get_irq_secure_id(void);
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/* GCE clock */
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void cmdq_dev_enable_gce_clock(bool enable);
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bool cmdq_dev_gce_clock_is_enable(void);
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bool cmdq_dev_mmsys_clock_is_enable(void);
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/* virtual address */
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long cmdq_dev_get_module_base_VA_GCE(void);
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unsigned long cmdq_dev_alloc_reference_VA_by_name(const char *ref_name);
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/* Other modules information */
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void cmdq_dev_free_module_base_VA(const long VA);
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u32 cmdq_dev_get_mmsys_dummy_reg_offset(void);
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/* physical address */
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phys_addr_t cmdq_dev_get_reference_PA(const char *ref_name, int index);
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phys_addr_t cmdq_dev_get_module_base_PA_GCE(void);
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/* GCE event */
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void cmdq_dev_init_event_table(struct device_node *node);
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void cmdq_dev_test_dts_correctness(void);
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/* device initialization / deinitialization */
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void cmdq_dev_init(struct platform_device *pDevice);
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void cmdq_dev_deinit(void);
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/* dma_set_mask result, to show in status */
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s32 cmdq_dev_get_dma_mask_result(void);
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u32 cmdq_dev_get_thread_count(void);
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struct cmdq_dts_setting {
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u32 prefetch_thread_count;
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u32 *prefetch_size;
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u32 ctl_int0;
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u32 cpr_size;
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};
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/* callback when read resource from device tree */
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typedef void(*CMDQ_DEV_INIT_RESOURCE_CB) (u32 engineFlag,
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enum cmdq_event resourceEvent);
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void cmdq_dev_get_dts_setting(struct cmdq_dts_setting *dts_setting);
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void cmdq_dev_init_resource(CMDQ_DEV_INIT_RESOURCE_CB init_cb);
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#endif /* __CMDQ_DEVICE_H__ */
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