251 lines
6.3 KiB
C
251 lines
6.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/init.h>
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#include <linux/suspend.h>
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#include <asm/io.h>
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#include <asm/time.h>
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#include <asm/mpc52xx.h>
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#include <asm/switch_to.h>
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/* defined in lite5200_sleep.S and only used here */
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extern void lite5200_low_power(void __iomem *sram, void __iomem *mbar);
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static struct mpc52xx_cdm __iomem *cdm;
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static struct mpc52xx_intr __iomem *pic;
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static struct mpc52xx_sdma __iomem *bes;
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static struct mpc52xx_xlb __iomem *xlb;
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static struct mpc52xx_gpio __iomem *gps;
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static struct mpc52xx_gpio_wkup __iomem *gpw;
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static void __iomem *pci;
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static void __iomem *sram;
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static const int sram_size = 0x4000; /* 16 kBytes */
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static void __iomem *mbar;
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static suspend_state_t lite5200_pm_target_state;
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static int lite5200_pm_valid(suspend_state_t state)
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{
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switch (state) {
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case PM_SUSPEND_STANDBY:
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case PM_SUSPEND_MEM:
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return 1;
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default:
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return 0;
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}
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}
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static int lite5200_pm_begin(suspend_state_t state)
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{
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if (lite5200_pm_valid(state)) {
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lite5200_pm_target_state = state;
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return 0;
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}
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return -EINVAL;
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}
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static int lite5200_pm_prepare(void)
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{
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struct device_node *np;
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const struct of_device_id immr_ids[] = {
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{ .compatible = "fsl,mpc5200-immr", },
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{ .compatible = "fsl,mpc5200b-immr", },
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{ .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
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{ .type = "builtin", .compatible = "mpc5200", }, /* efika */
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{}
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};
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u64 regaddr64 = 0;
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const u32 *regaddr_p;
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/* deep sleep? let mpc52xx code handle that */
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if (lite5200_pm_target_state == PM_SUSPEND_STANDBY)
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return mpc52xx_pm_prepare();
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if (lite5200_pm_target_state != PM_SUSPEND_MEM)
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return -EINVAL;
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/* map registers */
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np = of_find_matching_node(NULL, immr_ids);
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regaddr_p = of_get_address(np, 0, NULL, NULL);
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if (regaddr_p)
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regaddr64 = of_translate_address(np, regaddr_p);
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of_node_put(np);
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mbar = ioremap((u32) regaddr64, 0xC000);
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if (!mbar) {
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printk(KERN_ERR "%s:%i Error mapping registers\n", __func__, __LINE__);
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return -ENOSYS;
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}
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cdm = mbar + 0x200;
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pic = mbar + 0x500;
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gps = mbar + 0xb00;
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gpw = mbar + 0xc00;
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pci = mbar + 0xd00;
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bes = mbar + 0x1200;
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xlb = mbar + 0x1f00;
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sram = mbar + 0x8000;
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return 0;
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}
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/* save and restore registers not bound to any real devices */
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static struct mpc52xx_cdm scdm;
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static struct mpc52xx_intr spic;
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static struct mpc52xx_sdma sbes;
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static struct mpc52xx_xlb sxlb;
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static struct mpc52xx_gpio sgps;
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static struct mpc52xx_gpio_wkup sgpw;
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static char spci[0x200];
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static void lite5200_save_regs(void)
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{
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_memcpy_fromio(&spic, pic, sizeof(*pic));
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_memcpy_fromio(&sbes, bes, sizeof(*bes));
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_memcpy_fromio(&scdm, cdm, sizeof(*cdm));
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_memcpy_fromio(&sxlb, xlb, sizeof(*xlb));
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_memcpy_fromio(&sgps, gps, sizeof(*gps));
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_memcpy_fromio(&sgpw, gpw, sizeof(*gpw));
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_memcpy_fromio(spci, pci, 0x200);
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_memcpy_fromio(saved_sram, sram, sram_size);
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}
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static void lite5200_restore_regs(void)
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{
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int i;
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_memcpy_toio(sram, saved_sram, sram_size);
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/* PCI Configuration */
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_memcpy_toio(pci, spci, 0x200);
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/*
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* GPIOs. Interrupt Master Enable has higher address then other
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* registers, so just memcpy is ok.
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*/
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_memcpy_toio(gpw, &sgpw, sizeof(*gpw));
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_memcpy_toio(gps, &sgps, sizeof(*gps));
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/* XLB Arbitrer */
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out_be32(&xlb->snoop_window, sxlb.snoop_window);
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out_be32(&xlb->master_priority, sxlb.master_priority);
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out_be32(&xlb->master_pri_enable, sxlb.master_pri_enable);
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/* enable */
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out_be32(&xlb->int_enable, sxlb.int_enable);
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out_be32(&xlb->config, sxlb.config);
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/* CDM - Clock Distribution Module */
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out_8(&cdm->ipb_clk_sel, scdm.ipb_clk_sel);
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out_8(&cdm->pci_clk_sel, scdm.pci_clk_sel);
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out_8(&cdm->ext_48mhz_en, scdm.ext_48mhz_en);
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out_8(&cdm->fd_enable, scdm.fd_enable);
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out_be16(&cdm->fd_counters, scdm.fd_counters);
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out_be32(&cdm->clk_enables, scdm.clk_enables);
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out_8(&cdm->osc_disable, scdm.osc_disable);
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out_be16(&cdm->mclken_div_psc1, scdm.mclken_div_psc1);
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out_be16(&cdm->mclken_div_psc2, scdm.mclken_div_psc2);
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out_be16(&cdm->mclken_div_psc3, scdm.mclken_div_psc3);
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out_be16(&cdm->mclken_div_psc6, scdm.mclken_div_psc6);
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/* BESTCOMM */
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out_be32(&bes->taskBar, sbes.taskBar);
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out_be32(&bes->currentPointer, sbes.currentPointer);
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out_be32(&bes->endPointer, sbes.endPointer);
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out_be32(&bes->variablePointer, sbes.variablePointer);
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out_8(&bes->IntVect1, sbes.IntVect1);
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out_8(&bes->IntVect2, sbes.IntVect2);
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out_be16(&bes->PtdCntrl, sbes.PtdCntrl);
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for (i=0; i<32; i++)
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out_8(&bes->ipr[i], sbes.ipr[i]);
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out_be32(&bes->cReqSelect, sbes.cReqSelect);
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out_be32(&bes->task_size0, sbes.task_size0);
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out_be32(&bes->task_size1, sbes.task_size1);
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out_be32(&bes->MDEDebug, sbes.MDEDebug);
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out_be32(&bes->ADSDebug, sbes.ADSDebug);
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out_be32(&bes->Value1, sbes.Value1);
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out_be32(&bes->Value2, sbes.Value2);
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out_be32(&bes->Control, sbes.Control);
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out_be32(&bes->Status, sbes.Status);
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out_be32(&bes->PTDDebug, sbes.PTDDebug);
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/* restore tasks */
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for (i=0; i<16; i++)
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out_be16(&bes->tcr[i], sbes.tcr[i]);
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/* enable interrupts */
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out_be32(&bes->IntPend, sbes.IntPend);
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out_be32(&bes->IntMask, sbes.IntMask);
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/* PIC */
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out_be32(&pic->per_pri1, spic.per_pri1);
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out_be32(&pic->per_pri2, spic.per_pri2);
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out_be32(&pic->per_pri3, spic.per_pri3);
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out_be32(&pic->main_pri1, spic.main_pri1);
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out_be32(&pic->main_pri2, spic.main_pri2);
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out_be32(&pic->enc_status, spic.enc_status);
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/* unmask and enable interrupts */
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out_be32(&pic->per_mask, spic.per_mask);
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out_be32(&pic->main_mask, spic.main_mask);
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out_be32(&pic->ctrl, spic.ctrl);
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}
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static int lite5200_pm_enter(suspend_state_t state)
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{
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/* deep sleep? let mpc52xx code handle that */
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if (state == PM_SUSPEND_STANDBY) {
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return mpc52xx_pm_enter(state);
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}
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lite5200_save_regs();
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/* effectively save FP regs */
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enable_kernel_fp();
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lite5200_low_power(sram, mbar);
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lite5200_restore_regs();
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iounmap(mbar);
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return 0;
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}
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static void lite5200_pm_finish(void)
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{
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/* deep sleep? let mpc52xx code handle that */
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if (lite5200_pm_target_state == PM_SUSPEND_STANDBY)
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mpc52xx_pm_finish();
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}
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static void lite5200_pm_end(void)
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{
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lite5200_pm_target_state = PM_SUSPEND_ON;
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}
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static const struct platform_suspend_ops lite5200_pm_ops = {
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.valid = lite5200_pm_valid,
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.begin = lite5200_pm_begin,
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.prepare = lite5200_pm_prepare,
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.enter = lite5200_pm_enter,
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.finish = lite5200_pm_finish,
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.end = lite5200_pm_end,
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};
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int __init lite5200_pm_init(void)
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{
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suspend_set_ops(&lite5200_pm_ops);
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return 0;
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}
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