215 lines
6.1 KiB
C
215 lines
6.1 KiB
C
/*
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* Keymile km82xx support
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* Copyright 2008-2011 DENX Software Engineering GmbH
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* Author: Heiko Schocher <hs@denx.de>
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*
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* based on code from:
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* Copyright 2007 Freescale Semiconductor, Inc.
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* Author: Scott Wood <scottwood@freescale.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/fsl_devices.h>
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#include <linux/of_platform.h>
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#include <linux/io.h>
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#include <asm/cpm2.h>
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#include <asm/udbg.h>
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#include <asm/machdep.h>
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#include <linux/time.h>
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#include <asm/mpc8260.h>
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#include <asm/prom.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/cpm2_pic.h>
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#include "pq2.h"
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static void __init km82xx_pic_init(void)
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{
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struct device_node *np = of_find_compatible_node(NULL, NULL,
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"fsl,pq2-pic");
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if (!np) {
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pr_err("PIC init: can not find cpm-pic node\n");
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return;
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}
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cpm2_pic_init(np);
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of_node_put(np);
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}
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struct cpm_pin {
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int port, pin, flags;
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};
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static __initdata struct cpm_pin km82xx_pins[] = {
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/* SMC1 */
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{2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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/* SMC2 */
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{0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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/* SCC1 */
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{2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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/* SCC4 */
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{2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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/* FCC1 */
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{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
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{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
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{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
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{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
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{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* FCC2 */
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{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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{2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* MDC */
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{0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO},
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#if defined(CONFIG_I2C_CPM)
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/* I2C */
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{3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
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{3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
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#endif
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/* USB */
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{0, 10, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, /* FULL_SPEED */
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{0, 11, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, /*/SLAVE */
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{2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXN */
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{2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXP */
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{2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* /OE */
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{2, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXCLK */
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{3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXP */
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{3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXN */
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{3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXD */
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/* SPI */
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{3, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MISO PD16 */
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{3, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MOSI PD17 */
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{3, 18, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_CLK PD18 */
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};
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static void __init init_ioports(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(km82xx_pins); i++) {
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const struct cpm_pin *pin = &km82xx_pins[i];
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cpm2_set_pin(pin->port, pin->pin, pin->flags);
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}
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cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);
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cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
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cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_RTX);
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cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_TX);
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cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
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cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
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/* Force USB FULL SPEED bit to '1' */
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setbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 10));
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/* clear USB_SLAVE */
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clrbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 11));
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}
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static void __init km82xx_setup_arch(void)
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{
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if (ppc_md.progress)
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ppc_md.progress("km82xx_setup_arch()", 0);
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cpm2_reset();
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/* When this is set, snooping CPM DMA from RAM causes
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* machine checks. See erratum SIU18.
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*/
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clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
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init_ioports();
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if (ppc_md.progress)
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ppc_md.progress("km82xx_setup_arch(), finish", 0);
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}
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static const struct of_device_id of_bus_ids[] __initconst = {
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{ .compatible = "simple-bus", },
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{},
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};
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static int __init declare_of_platform_devices(void)
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{
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of_platform_bus_probe(NULL, of_bus_ids, NULL);
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return 0;
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}
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machine_device_initcall(km82xx, declare_of_platform_devices);
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init km82xx_probe(void)
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{
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return of_machine_is_compatible("keymile,km82xx");
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}
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define_machine(km82xx)
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{
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.name = "Keymile km82xx",
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.probe = km82xx_probe,
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.setup_arch = km82xx_setup_arch,
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.init_IRQ = km82xx_pic_init,
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.get_irq = cpm2_get_irq,
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.calibrate_decr = generic_calibrate_decr,
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.restart = pq2_restart,
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.progress = udbg_progress,
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};
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