772 lines
22 KiB
C
772 lines
22 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* This file contains definitions from Hyper-V Hypervisor Top-Level Functional
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* Specification (TLFS):
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* https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs
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*/
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#ifndef _ASM_X86_HYPERV_TLFS_H
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#define _ASM_X86_HYPERV_TLFS_H
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#include <linux/types.h>
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/*
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* The below CPUID leaves are present if VersionAndFeatures.HypervisorPresent
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* is set by CPUID(HvCpuIdFunctionVersionAndFeatures).
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*/
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#define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS 0x40000000
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#define HYPERV_CPUID_INTERFACE 0x40000001
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#define HYPERV_CPUID_VERSION 0x40000002
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#define HYPERV_CPUID_FEATURES 0x40000003
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#define HYPERV_CPUID_ENLIGHTMENT_INFO 0x40000004
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#define HYPERV_CPUID_IMPLEMENT_LIMITS 0x40000005
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#define HYPERV_CPUID_NESTED_FEATURES 0x4000000A
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#define HYPERV_HYPERVISOR_PRESENT_BIT 0x80000000
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#define HYPERV_CPUID_MIN 0x40000005
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#define HYPERV_CPUID_MAX 0x4000ffff
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/*
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* Feature identification. EAX indicates which features are available
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* to the partition based upon the current partition privileges.
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*/
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/* VP Runtime (HV_X64_MSR_VP_RUNTIME) available */
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#define HV_X64_MSR_VP_RUNTIME_AVAILABLE (1 << 0)
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/* Partition Reference Counter (HV_X64_MSR_TIME_REF_COUNT) available*/
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#define HV_MSR_TIME_REF_COUNT_AVAILABLE (1 << 1)
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/* Partition reference TSC MSR is available */
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#define HV_MSR_REFERENCE_TSC_AVAILABLE (1 << 9)
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/* A partition's reference time stamp counter (TSC) page */
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#define HV_X64_MSR_REFERENCE_TSC 0x40000021
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/*
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* There is a single feature flag that signifies if the partition has access
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* to MSRs with local APIC and TSC frequencies.
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*/
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#define HV_X64_ACCESS_FREQUENCY_MSRS (1 << 11)
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/* AccessReenlightenmentControls privilege */
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#define HV_X64_ACCESS_REENLIGHTENMENT BIT(13)
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/*
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* Basic SynIC MSRs (HV_X64_MSR_SCONTROL through HV_X64_MSR_EOM
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* and HV_X64_MSR_SINT0 through HV_X64_MSR_SINT15) available
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*/
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#define HV_X64_MSR_SYNIC_AVAILABLE (1 << 2)
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/*
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* Synthetic Timer MSRs (HV_X64_MSR_STIMER0_CONFIG through
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* HV_X64_MSR_STIMER3_COUNT) available
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*/
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#define HV_MSR_SYNTIMER_AVAILABLE (1 << 3)
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/*
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* APIC access MSRs (HV_X64_MSR_EOI, HV_X64_MSR_ICR and HV_X64_MSR_TPR)
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* are available
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*/
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#define HV_X64_MSR_APIC_ACCESS_AVAILABLE (1 << 4)
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/* Hypercall MSRs (HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL) available*/
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#define HV_X64_MSR_HYPERCALL_AVAILABLE (1 << 5)
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/* Access virtual processor index MSR (HV_X64_MSR_VP_INDEX) available*/
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#define HV_X64_MSR_VP_INDEX_AVAILABLE (1 << 6)
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/* Virtual system reset MSR (HV_X64_MSR_RESET) is available*/
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#define HV_X64_MSR_RESET_AVAILABLE (1 << 7)
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/*
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* Access statistics pages MSRs (HV_X64_MSR_STATS_PARTITION_RETAIL_PAGE,
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* HV_X64_MSR_STATS_PARTITION_INTERNAL_PAGE, HV_X64_MSR_STATS_VP_RETAIL_PAGE,
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* HV_X64_MSR_STATS_VP_INTERNAL_PAGE) available
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*/
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#define HV_X64_MSR_STAT_PAGES_AVAILABLE (1 << 8)
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/* Frequency MSRs available */
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#define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE (1 << 8)
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/* Crash MSR available */
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#define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE (1 << 10)
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/* stimer Direct Mode is available */
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#define HV_STIMER_DIRECT_MODE_AVAILABLE (1 << 19)
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/*
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* Feature identification: EBX indicates which flags were specified at
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* partition creation. The format is the same as the partition creation
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* flag structure defined in section Partition Creation Flags.
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*/
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#define HV_X64_CREATE_PARTITIONS (1 << 0)
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#define HV_X64_ACCESS_PARTITION_ID (1 << 1)
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#define HV_X64_ACCESS_MEMORY_POOL (1 << 2)
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#define HV_X64_ADJUST_MESSAGE_BUFFERS (1 << 3)
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#define HV_X64_POST_MESSAGES (1 << 4)
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#define HV_X64_SIGNAL_EVENTS (1 << 5)
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#define HV_X64_CREATE_PORT (1 << 6)
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#define HV_X64_CONNECT_PORT (1 << 7)
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#define HV_X64_ACCESS_STATS (1 << 8)
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#define HV_X64_DEBUGGING (1 << 11)
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#define HV_X64_CPU_POWER_MANAGEMENT (1 << 12)
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#define HV_X64_CONFIGURE_PROFILER (1 << 13)
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/*
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* Feature identification. EDX indicates which miscellaneous features
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* are available to the partition.
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*/
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/* The MWAIT instruction is available (per section MONITOR / MWAIT) */
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#define HV_X64_MWAIT_AVAILABLE (1 << 0)
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/* Guest debugging support is available */
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#define HV_X64_GUEST_DEBUGGING_AVAILABLE (1 << 1)
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/* Performance Monitor support is available*/
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#define HV_X64_PERF_MONITOR_AVAILABLE (1 << 2)
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/* Support for physical CPU dynamic partitioning events is available*/
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#define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE (1 << 3)
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/*
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* Support for passing hypercall input parameter block via XMM
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* registers is available
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*/
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#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE (1 << 4)
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/* Support for a virtual guest idle state is available */
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#define HV_X64_GUEST_IDLE_STATE_AVAILABLE (1 << 5)
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/* Guest crash data handler available */
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#define HV_X64_GUEST_CRASH_MSR_AVAILABLE (1 << 10)
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/*
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* Implementation recommendations. Indicates which behaviors the hypervisor
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* recommends the OS implement for optimal performance.
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*/
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/*
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* Recommend using hypercall for address space switches rather
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* than MOV to CR3 instruction
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*/
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#define HV_X64_AS_SWITCH_RECOMMENDED (1 << 0)
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/* Recommend using hypercall for local TLB flushes rather
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* than INVLPG or MOV to CR3 instructions */
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#define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED (1 << 1)
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/*
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* Recommend using hypercall for remote TLB flushes rather
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* than inter-processor interrupts
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*/
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#define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED (1 << 2)
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/*
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* Recommend using MSRs for accessing APIC registers
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* EOI, ICR and TPR rather than their memory-mapped counterparts
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*/
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#define HV_X64_APIC_ACCESS_RECOMMENDED (1 << 3)
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/* Recommend using the hypervisor-provided MSR to initiate a system RESET */
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#define HV_X64_SYSTEM_RESET_RECOMMENDED (1 << 4)
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/*
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* Recommend using relaxed timing for this partition. If used,
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* the VM should disable any watchdog timeouts that rely on the
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* timely delivery of external interrupts
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*/
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#define HV_X64_RELAXED_TIMING_RECOMMENDED (1 << 5)
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/*
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* Recommend not using Auto End-Of-Interrupt feature
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*/
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#define HV_DEPRECATING_AEOI_RECOMMENDED (1 << 9)
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/*
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* Recommend using cluster IPI hypercalls.
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*/
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#define HV_X64_CLUSTER_IPI_RECOMMENDED (1 << 10)
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/* Recommend using the newer ExProcessorMasks interface */
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#define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED (1 << 11)
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/* Recommend using enlightened VMCS */
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#define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED (1 << 14)
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/*
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* Crash notification flags.
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*/
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#define HV_CRASH_CTL_CRASH_NOTIFY_MSG BIT_ULL(62)
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#define HV_CRASH_CTL_CRASH_NOTIFY BIT_ULL(63)
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/* MSR used to identify the guest OS. */
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#define HV_X64_MSR_GUEST_OS_ID 0x40000000
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/* MSR used to setup pages used to communicate with the hypervisor. */
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#define HV_X64_MSR_HYPERCALL 0x40000001
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/* MSR used to provide vcpu index */
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#define HV_X64_MSR_VP_INDEX 0x40000002
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/* MSR used to reset the guest OS. */
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#define HV_X64_MSR_RESET 0x40000003
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/* MSR used to provide vcpu runtime in 100ns units */
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#define HV_X64_MSR_VP_RUNTIME 0x40000010
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/* MSR used to read the per-partition time reference counter */
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#define HV_X64_MSR_TIME_REF_COUNT 0x40000020
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/* MSR used to retrieve the TSC frequency */
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#define HV_X64_MSR_TSC_FREQUENCY 0x40000022
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/* MSR used to retrieve the local APIC timer frequency */
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#define HV_X64_MSR_APIC_FREQUENCY 0x40000023
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/* Define the virtual APIC registers */
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#define HV_X64_MSR_EOI 0x40000070
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#define HV_X64_MSR_ICR 0x40000071
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#define HV_X64_MSR_TPR 0x40000072
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#define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073
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/* Define synthetic interrupt controller model specific registers. */
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#define HV_X64_MSR_SCONTROL 0x40000080
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#define HV_X64_MSR_SVERSION 0x40000081
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#define HV_X64_MSR_SIEFP 0x40000082
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#define HV_X64_MSR_SIMP 0x40000083
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#define HV_X64_MSR_EOM 0x40000084
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#define HV_X64_MSR_SINT0 0x40000090
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#define HV_X64_MSR_SINT1 0x40000091
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#define HV_X64_MSR_SINT2 0x40000092
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#define HV_X64_MSR_SINT3 0x40000093
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#define HV_X64_MSR_SINT4 0x40000094
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#define HV_X64_MSR_SINT5 0x40000095
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#define HV_X64_MSR_SINT6 0x40000096
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#define HV_X64_MSR_SINT7 0x40000097
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#define HV_X64_MSR_SINT8 0x40000098
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#define HV_X64_MSR_SINT9 0x40000099
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#define HV_X64_MSR_SINT10 0x4000009A
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#define HV_X64_MSR_SINT11 0x4000009B
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#define HV_X64_MSR_SINT12 0x4000009C
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#define HV_X64_MSR_SINT13 0x4000009D
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#define HV_X64_MSR_SINT14 0x4000009E
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#define HV_X64_MSR_SINT15 0x4000009F
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/*
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* Synthetic Timer MSRs. Four timers per vcpu.
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*/
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#define HV_X64_MSR_STIMER0_CONFIG 0x400000B0
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#define HV_X64_MSR_STIMER0_COUNT 0x400000B1
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#define HV_X64_MSR_STIMER1_CONFIG 0x400000B2
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#define HV_X64_MSR_STIMER1_COUNT 0x400000B3
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#define HV_X64_MSR_STIMER2_CONFIG 0x400000B4
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#define HV_X64_MSR_STIMER2_COUNT 0x400000B5
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#define HV_X64_MSR_STIMER3_CONFIG 0x400000B6
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#define HV_X64_MSR_STIMER3_COUNT 0x400000B7
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/* Hyper-V guest crash notification MSR's */
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#define HV_X64_MSR_CRASH_P0 0x40000100
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#define HV_X64_MSR_CRASH_P1 0x40000101
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#define HV_X64_MSR_CRASH_P2 0x40000102
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#define HV_X64_MSR_CRASH_P3 0x40000103
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#define HV_X64_MSR_CRASH_P4 0x40000104
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#define HV_X64_MSR_CRASH_CTL 0x40000105
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#define HV_X64_MSR_CRASH_CTL_NOTIFY (1ULL << 63)
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#define HV_X64_MSR_CRASH_PARAMS \
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(1 + (HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0))
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/*
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* Declare the MSR used to setup pages used to communicate with the hypervisor.
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*/
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union hv_x64_msr_hypercall_contents {
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u64 as_uint64;
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struct {
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u64 enable:1;
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u64 reserved:11;
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u64 guest_physical_address:52;
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};
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};
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/*
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* TSC page layout.
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*/
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struct ms_hyperv_tsc_page {
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volatile u32 tsc_sequence;
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u32 reserved1;
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volatile u64 tsc_scale;
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volatile s64 tsc_offset;
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u64 reserved2[509];
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};
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/*
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* The guest OS needs to register the guest ID with the hypervisor.
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* The guest ID is a 64 bit entity and the structure of this ID is
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* specified in the Hyper-V specification:
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*
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* msdn.microsoft.com/en-us/library/windows/hardware/ff542653%28v=vs.85%29.aspx
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*
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* While the current guideline does not specify how Linux guest ID(s)
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* need to be generated, our plan is to publish the guidelines for
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* Linux and other guest operating systems that currently are hosted
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* on Hyper-V. The implementation here conforms to this yet
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* unpublished guidelines.
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*
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*
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* Bit(s)
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* 63 - Indicates if the OS is Open Source or not; 1 is Open Source
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* 62:56 - Os Type; Linux is 0x100
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* 55:48 - Distro specific identification
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* 47:16 - Linux kernel version number
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* 15:0 - Distro specific identification
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*
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*
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*/
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#define HV_LINUX_VENDOR_ID 0x8100
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/* TSC emulation after migration */
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#define HV_X64_MSR_REENLIGHTENMENT_CONTROL 0x40000106
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/* Nested features (CPUID 0x4000000A) EAX */
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#define HV_X64_NESTED_GUEST_MAPPING_FLUSH BIT(18)
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#define HV_X64_NESTED_MSR_BITMAP BIT(19)
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struct hv_reenlightenment_control {
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__u64 vector:8;
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__u64 reserved1:8;
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__u64 enabled:1;
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__u64 reserved2:15;
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__u64 target_vp:32;
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};
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#define HV_X64_MSR_TSC_EMULATION_CONTROL 0x40000107
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#define HV_X64_MSR_TSC_EMULATION_STATUS 0x40000108
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struct hv_tsc_emulation_control {
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__u64 enabled:1;
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__u64 reserved:63;
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};
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struct hv_tsc_emulation_status {
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__u64 inprogress:1;
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__u64 reserved:63;
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};
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#define HV_X64_MSR_HYPERCALL_ENABLE 0x00000001
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#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT 12
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#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK \
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(~((1ull << HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT) - 1))
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#define HV_IPI_LOW_VECTOR 0x10
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#define HV_IPI_HIGH_VECTOR 0xff
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/* Declare the various hypercall operations. */
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#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002
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#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003
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#define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008
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#define HVCALL_SEND_IPI 0x000b
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#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013
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#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014
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#define HVCALL_SEND_IPI_EX 0x0015
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#define HVCALL_POST_MESSAGE 0x005c
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#define HVCALL_SIGNAL_EVENT 0x005d
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#define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af
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#define HV_X64_MSR_VP_ASSIST_PAGE_ENABLE 0x00000001
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#define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT 12
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#define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_MASK \
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(~((1ull << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT) - 1))
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/* Hyper-V Enlightened VMCS version mask in nested features CPUID */
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#define HV_X64_ENLIGHTENED_VMCS_VERSION 0xff
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#define HV_X64_MSR_TSC_REFERENCE_ENABLE 0x00000001
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#define HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT 12
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#define HV_PROCESSOR_POWER_STATE_C0 0
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#define HV_PROCESSOR_POWER_STATE_C1 1
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#define HV_PROCESSOR_POWER_STATE_C2 2
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#define HV_PROCESSOR_POWER_STATE_C3 3
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#define HV_FLUSH_ALL_PROCESSORS BIT(0)
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#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1)
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#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2)
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#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT BIT(3)
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enum HV_GENERIC_SET_FORMAT {
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HV_GENERIC_SET_SPARSE_4K,
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HV_GENERIC_SET_ALL,
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};
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#define HV_HYPERCALL_RESULT_MASK GENMASK_ULL(15, 0)
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#define HV_HYPERCALL_FAST_BIT BIT(16)
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#define HV_HYPERCALL_VARHEAD_OFFSET 17
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#define HV_HYPERCALL_REP_COMP_OFFSET 32
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#define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32)
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#define HV_HYPERCALL_REP_START_OFFSET 48
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#define HV_HYPERCALL_REP_START_MASK GENMASK_ULL(59, 48)
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/* hypercall status code */
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#define HV_STATUS_SUCCESS 0
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#define HV_STATUS_INVALID_HYPERCALL_CODE 2
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#define HV_STATUS_INVALID_HYPERCALL_INPUT 3
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#define HV_STATUS_INVALID_ALIGNMENT 4
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#define HV_STATUS_INVALID_PARAMETER 5
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#define HV_STATUS_INSUFFICIENT_MEMORY 11
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#define HV_STATUS_INVALID_PORT_ID 17
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#define HV_STATUS_INVALID_CONNECTION_ID 18
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#define HV_STATUS_INSUFFICIENT_BUFFERS 19
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typedef struct _HV_REFERENCE_TSC_PAGE {
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__u32 tsc_sequence;
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__u32 res1;
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__u64 tsc_scale;
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__s64 tsc_offset;
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} HV_REFERENCE_TSC_PAGE, *PHV_REFERENCE_TSC_PAGE;
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/* Define the number of synthetic interrupt sources. */
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#define HV_SYNIC_SINT_COUNT (16)
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/* Define the expected SynIC version. */
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#define HV_SYNIC_VERSION_1 (0x1)
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/* Valid SynIC vectors are 16-255. */
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#define HV_SYNIC_FIRST_VALID_VECTOR (16)
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#define HV_SYNIC_CONTROL_ENABLE (1ULL << 0)
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#define HV_SYNIC_SIMP_ENABLE (1ULL << 0)
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#define HV_SYNIC_SIEFP_ENABLE (1ULL << 0)
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#define HV_SYNIC_SINT_MASKED (1ULL << 16)
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#define HV_SYNIC_SINT_AUTO_EOI (1ULL << 17)
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#define HV_SYNIC_SINT_VECTOR_MASK (0xFF)
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|
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#define HV_SYNIC_STIMER_COUNT (4)
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|
|
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/* Define synthetic interrupt controller message constants. */
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|
#define HV_MESSAGE_SIZE (256)
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#define HV_MESSAGE_PAYLOAD_BYTE_COUNT (240)
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#define HV_MESSAGE_PAYLOAD_QWORD_COUNT (30)
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|
|
|
/* Define hypervisor message types. */
|
|
enum hv_message_type {
|
|
HVMSG_NONE = 0x00000000,
|
|
|
|
/* Memory access messages. */
|
|
HVMSG_UNMAPPED_GPA = 0x80000000,
|
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HVMSG_GPA_INTERCEPT = 0x80000001,
|
|
|
|
/* Timer notification messages. */
|
|
HVMSG_TIMER_EXPIRED = 0x80000010,
|
|
|
|
/* Error messages. */
|
|
HVMSG_INVALID_VP_REGISTER_VALUE = 0x80000020,
|
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HVMSG_UNRECOVERABLE_EXCEPTION = 0x80000021,
|
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HVMSG_UNSUPPORTED_FEATURE = 0x80000022,
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|
|
|
/* Trace buffer complete messages. */
|
|
HVMSG_EVENTLOG_BUFFERCOMPLETE = 0x80000040,
|
|
|
|
/* Platform-specific processor intercept messages. */
|
|
HVMSG_X64_IOPORT_INTERCEPT = 0x80010000,
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|
HVMSG_X64_MSR_INTERCEPT = 0x80010001,
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HVMSG_X64_CPUID_INTERCEPT = 0x80010002,
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HVMSG_X64_EXCEPTION_INTERCEPT = 0x80010003,
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HVMSG_X64_APIC_EOI = 0x80010004,
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HVMSG_X64_LEGACY_FP_ERROR = 0x80010005
|
|
};
|
|
|
|
/* Define synthetic interrupt controller message flags. */
|
|
union hv_message_flags {
|
|
__u8 asu8;
|
|
struct {
|
|
__u8 msg_pending:1;
|
|
__u8 reserved:7;
|
|
};
|
|
};
|
|
|
|
/* Define port identifier type. */
|
|
union hv_port_id {
|
|
__u32 asu32;
|
|
struct {
|
|
__u32 id:24;
|
|
__u32 reserved:8;
|
|
} u;
|
|
};
|
|
|
|
/* Define synthetic interrupt controller message header. */
|
|
struct hv_message_header {
|
|
__u32 message_type;
|
|
__u8 payload_size;
|
|
union hv_message_flags message_flags;
|
|
__u8 reserved[2];
|
|
union {
|
|
__u64 sender;
|
|
union hv_port_id port;
|
|
};
|
|
};
|
|
|
|
/* Define synthetic interrupt controller message format. */
|
|
struct hv_message {
|
|
struct hv_message_header header;
|
|
union {
|
|
__u64 payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
|
|
} u;
|
|
};
|
|
|
|
/* Define the synthetic interrupt message page layout. */
|
|
struct hv_message_page {
|
|
struct hv_message sint_message[HV_SYNIC_SINT_COUNT];
|
|
};
|
|
|
|
/* Define timer message payload structure. */
|
|
struct hv_timer_message_payload {
|
|
__u32 timer_index;
|
|
__u32 reserved;
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|
__u64 expiration_time; /* When the timer expired */
|
|
__u64 delivery_time; /* When the message was delivered */
|
|
};
|
|
|
|
/* Define virtual processor assist page structure. */
|
|
struct hv_vp_assist_page {
|
|
__u32 apic_assist;
|
|
__u32 reserved;
|
|
__u64 vtl_control[2];
|
|
__u64 nested_enlightenments_control[2];
|
|
__u32 enlighten_vmentry;
|
|
__u64 current_nested_vmcs;
|
|
};
|
|
|
|
struct hv_enlightened_vmcs {
|
|
u32 revision_id;
|
|
u32 abort;
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|
|
|
u16 host_es_selector;
|
|
u16 host_cs_selector;
|
|
u16 host_ss_selector;
|
|
u16 host_ds_selector;
|
|
u16 host_fs_selector;
|
|
u16 host_gs_selector;
|
|
u16 host_tr_selector;
|
|
|
|
u64 host_ia32_pat;
|
|
u64 host_ia32_efer;
|
|
|
|
u64 host_cr0;
|
|
u64 host_cr3;
|
|
u64 host_cr4;
|
|
|
|
u64 host_ia32_sysenter_esp;
|
|
u64 host_ia32_sysenter_eip;
|
|
u64 host_rip;
|
|
u32 host_ia32_sysenter_cs;
|
|
|
|
u32 pin_based_vm_exec_control;
|
|
u32 vm_exit_controls;
|
|
u32 secondary_vm_exec_control;
|
|
|
|
u64 io_bitmap_a;
|
|
u64 io_bitmap_b;
|
|
u64 msr_bitmap;
|
|
|
|
u16 guest_es_selector;
|
|
u16 guest_cs_selector;
|
|
u16 guest_ss_selector;
|
|
u16 guest_ds_selector;
|
|
u16 guest_fs_selector;
|
|
u16 guest_gs_selector;
|
|
u16 guest_ldtr_selector;
|
|
u16 guest_tr_selector;
|
|
|
|
u32 guest_es_limit;
|
|
u32 guest_cs_limit;
|
|
u32 guest_ss_limit;
|
|
u32 guest_ds_limit;
|
|
u32 guest_fs_limit;
|
|
u32 guest_gs_limit;
|
|
u32 guest_ldtr_limit;
|
|
u32 guest_tr_limit;
|
|
u32 guest_gdtr_limit;
|
|
u32 guest_idtr_limit;
|
|
|
|
u32 guest_es_ar_bytes;
|
|
u32 guest_cs_ar_bytes;
|
|
u32 guest_ss_ar_bytes;
|
|
u32 guest_ds_ar_bytes;
|
|
u32 guest_fs_ar_bytes;
|
|
u32 guest_gs_ar_bytes;
|
|
u32 guest_ldtr_ar_bytes;
|
|
u32 guest_tr_ar_bytes;
|
|
|
|
u64 guest_es_base;
|
|
u64 guest_cs_base;
|
|
u64 guest_ss_base;
|
|
u64 guest_ds_base;
|
|
u64 guest_fs_base;
|
|
u64 guest_gs_base;
|
|
u64 guest_ldtr_base;
|
|
u64 guest_tr_base;
|
|
u64 guest_gdtr_base;
|
|
u64 guest_idtr_base;
|
|
|
|
u64 padding64_1[3];
|
|
|
|
u64 vm_exit_msr_store_addr;
|
|
u64 vm_exit_msr_load_addr;
|
|
u64 vm_entry_msr_load_addr;
|
|
|
|
u64 cr3_target_value0;
|
|
u64 cr3_target_value1;
|
|
u64 cr3_target_value2;
|
|
u64 cr3_target_value3;
|
|
|
|
u32 page_fault_error_code_mask;
|
|
u32 page_fault_error_code_match;
|
|
|
|
u32 cr3_target_count;
|
|
u32 vm_exit_msr_store_count;
|
|
u32 vm_exit_msr_load_count;
|
|
u32 vm_entry_msr_load_count;
|
|
|
|
u64 tsc_offset;
|
|
u64 virtual_apic_page_addr;
|
|
u64 vmcs_link_pointer;
|
|
|
|
u64 guest_ia32_debugctl;
|
|
u64 guest_ia32_pat;
|
|
u64 guest_ia32_efer;
|
|
|
|
u64 guest_pdptr0;
|
|
u64 guest_pdptr1;
|
|
u64 guest_pdptr2;
|
|
u64 guest_pdptr3;
|
|
|
|
u64 guest_pending_dbg_exceptions;
|
|
u64 guest_sysenter_esp;
|
|
u64 guest_sysenter_eip;
|
|
|
|
u32 guest_activity_state;
|
|
u32 guest_sysenter_cs;
|
|
|
|
u64 cr0_guest_host_mask;
|
|
u64 cr4_guest_host_mask;
|
|
u64 cr0_read_shadow;
|
|
u64 cr4_read_shadow;
|
|
u64 guest_cr0;
|
|
u64 guest_cr3;
|
|
u64 guest_cr4;
|
|
u64 guest_dr7;
|
|
|
|
u64 host_fs_base;
|
|
u64 host_gs_base;
|
|
u64 host_tr_base;
|
|
u64 host_gdtr_base;
|
|
u64 host_idtr_base;
|
|
u64 host_rsp;
|
|
|
|
u64 ept_pointer;
|
|
|
|
u16 virtual_processor_id;
|
|
u16 padding16[3];
|
|
|
|
u64 padding64_2[5];
|
|
u64 guest_physical_address;
|
|
|
|
u32 vm_instruction_error;
|
|
u32 vm_exit_reason;
|
|
u32 vm_exit_intr_info;
|
|
u32 vm_exit_intr_error_code;
|
|
u32 idt_vectoring_info_field;
|
|
u32 idt_vectoring_error_code;
|
|
u32 vm_exit_instruction_len;
|
|
u32 vmx_instruction_info;
|
|
|
|
u64 exit_qualification;
|
|
u64 exit_io_instruction_ecx;
|
|
u64 exit_io_instruction_esi;
|
|
u64 exit_io_instruction_edi;
|
|
u64 exit_io_instruction_eip;
|
|
|
|
u64 guest_linear_address;
|
|
u64 guest_rsp;
|
|
u64 guest_rflags;
|
|
|
|
u32 guest_interruptibility_info;
|
|
u32 cpu_based_vm_exec_control;
|
|
u32 exception_bitmap;
|
|
u32 vm_entry_controls;
|
|
u32 vm_entry_intr_info_field;
|
|
u32 vm_entry_exception_error_code;
|
|
u32 vm_entry_instruction_len;
|
|
u32 tpr_threshold;
|
|
|
|
u64 guest_rip;
|
|
|
|
u32 hv_clean_fields;
|
|
u32 hv_padding_32;
|
|
u32 hv_synthetic_controls;
|
|
struct {
|
|
u32 nested_flush_hypercall:1;
|
|
u32 msr_bitmap:1;
|
|
u32 reserved:30;
|
|
} hv_enlightenments_control;
|
|
u32 hv_vp_id;
|
|
|
|
u64 hv_vm_id;
|
|
u64 partition_assist_page;
|
|
u64 padding64_4[4];
|
|
u64 guest_bndcfgs;
|
|
u64 padding64_5[7];
|
|
u64 xss_exit_bitmap;
|
|
u64 padding64_6[7];
|
|
};
|
|
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE 0
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_IO_BITMAP BIT(0)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_MSR_BITMAP BIT(1)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP2 BIT(2)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP1 BIT(3)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_PROC BIT(4)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_EVENT BIT(5)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_ENTRY BIT(6)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_EXCPN BIT(7)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CRDR BIT(8)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_XLAT BIT(9)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_BASIC BIT(10)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1 BIT(11)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2 BIT(12)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_POINTER BIT(13)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1 BIT(14)
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_ENLIGHTENMENTSCONTROL BIT(15)
|
|
|
|
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL 0xFFFF
|
|
|
|
#define HV_STIMER_ENABLE (1ULL << 0)
|
|
#define HV_STIMER_PERIODIC (1ULL << 1)
|
|
#define HV_STIMER_LAZY (1ULL << 2)
|
|
#define HV_STIMER_AUTOENABLE (1ULL << 3)
|
|
#define HV_STIMER_SINT(config) (__u8)(((config) >> 16) & 0x0F)
|
|
|
|
struct hv_vpset {
|
|
u64 format;
|
|
u64 valid_bank_mask;
|
|
u64 bank_contents[];
|
|
};
|
|
|
|
/* HvCallSendSyntheticClusterIpi hypercall */
|
|
struct hv_send_ipi {
|
|
u32 vector;
|
|
u32 reserved;
|
|
u64 cpu_mask;
|
|
};
|
|
|
|
/* HvCallSendSyntheticClusterIpiEx hypercall */
|
|
struct hv_send_ipi_ex {
|
|
u32 vector;
|
|
u32 reserved;
|
|
struct hv_vpset vp_set;
|
|
};
|
|
|
|
/* HvFlushGuestPhysicalAddressSpace hypercalls */
|
|
struct hv_guest_mapping_flush {
|
|
u64 address_space;
|
|
u64 flags;
|
|
};
|
|
|
|
/* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */
|
|
struct hv_tlb_flush {
|
|
u64 address_space;
|
|
u64 flags;
|
|
u64 processor_mask;
|
|
u64 gva_list[];
|
|
};
|
|
|
|
/* HvFlushVirtualAddressSpaceEx, HvFlushVirtualAddressListEx hypercalls */
|
|
struct hv_tlb_flush_ex {
|
|
u64 address_space;
|
|
u64 flags;
|
|
struct hv_vpset hv_vp_set;
|
|
u64 gva_list[];
|
|
};
|
|
|
|
#endif
|