6db4831e98
Android 14
131 lines
2.8 KiB
C
131 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt6853-clk.h>
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#define MT_CLKMGR_MODULE_INIT 0
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#define MT_CCF_BRINGUP 1
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#define INV_OFS -1
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/* get spm power status struct to register inside clk_data */
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static struct pwr_status pwr_stat = GATE_PWR_STAT(INV_OFS,
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INV_OFS, 0x0178, BIT(5), BIT(5));
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static const struct mtk_gate_regs apu10_cg_regs = {
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.set_ofs = 0x104,
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.clr_ofs = 0x108,
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.sta_ofs = 0x100,
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};
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static const struct mtk_gate_regs apu11_cg_regs = {
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.set_ofs = 0x910,
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.clr_ofs = 0x910,
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.sta_ofs = 0x910,
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};
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#define GATE_APU10(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &apu10_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr, \
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.pwr_stat = &pwr_stat, \
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}
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#define GATE_APU11(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &apu11_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_no_setclr, \
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.pwr_stat = &pwr_stat, \
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}
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static const struct mtk_gate apu1_clks[] = {
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/* APU10 */
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GATE_APU10(CLK_APU1_APU, "apu1_apu",
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"dsp2_ck"/* parent */, 0),
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GATE_APU10(CLK_APU1_AXI_M, "apu1_axi_m",
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"dsp2_ck"/* parent */, 1),
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GATE_APU10(CLK_APU1_JTAG, "apu1_jtag",
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"dsp2_ck"/* parent */, 2),
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/* APU11 */
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GATE_APU11(CLK_APU1_PCLK, "apu1_pclk",
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"dsp2_ck"/* parent */, 25),
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};
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static int clk_mt6853_apu1_probe(struct platform_device *pdev)
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{
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struct clk_onecell_data *clk_data;
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int r;
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struct device_node *node = pdev->dev.of_node;
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#if MT_CCF_BRINGUP
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pr_notice("%s init begin\n", __func__);
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#endif
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clk_data = mtk_alloc_clk_data(CLK_APU1_NR_CLK);
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mtk_clk_register_gates(node, apu1_clks, ARRAY_SIZE(apu1_clks),
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clk_data);
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r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
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if (r)
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pr_err("%s(): could not register clock provider: %d\n",
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__func__, r);
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#if MT_CCF_BRINGUP
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pr_notice("%s init end\n", __func__);
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#endif
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return r;
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}
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static const struct of_device_id of_match_clk_mt6853_apu1[] = {
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{ .compatible = "mediatek,mt6853-apu1", },
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{}
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};
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#if MT_CLKMGR_MODULE_INIT
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static struct platform_driver clk_mt6853_apu1_drv = {
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.probe = clk_mt6853_apu1_probe,
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.driver = {
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.name = "clk-mt6853-apu1",
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.of_match_table = of_match_clk_mt6853_apu1,
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},
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};
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builtin_platform_driver(clk_mt6853_apu1_drv);
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#else
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static struct platform_driver clk_mt6853_apu1_drv = {
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.probe = clk_mt6853_apu1_probe,
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.driver = {
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.name = "clk-mt6853-apu1",
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.of_match_table = of_match_clk_mt6853_apu1,
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},
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};
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static int __init clk_mt6853_apu1_platform_init(void)
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{
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return platform_driver_register(&clk_mt6853_apu1_drv);
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}
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arch_initcall(clk_mt6853_apu1_platform_init);
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#endif /* MT_CLKMGR_MODULE_INIT */
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