251 lines
6.6 KiB
C
251 lines
6.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/phy/phy.h>
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#define LVDSTX_CTL1 0x00
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#define LVDSTX_CTL2 0x04
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#define RG_LVDSTX_TVO (0xf << 0)
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#define RG_LVDSTX_TVCM (0xf << 4)
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#define RG_LVDSTX_TSTCLK_SEL (0x3 << 8)
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#define RG_LVDSTX_TSTCLKDIV_EN BIT(10)
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#define RG_LVDSTX_TSTCLK_EN BIT(11)
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#define RG_LVDSTX_TSTCLKDIV_SEL (3 << 12)
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#define RG_LVDSTX_MPX_SEL (3 << 14)
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#define RG_LVDSTX_BIAS_SEL (3 << 16)
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#define RG_LVDSTX_R_TERM (3 << 18)
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#define RG_LVDSTX_SEL_CKTST BIT(20)
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#define RG_LVDSTX_SEL_MERGE BIT(21)
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#define RG_LVDSTX_LDO_EN BIT(22)
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#define RG_LVDSTX_BIAS_EN BIT(23)
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#define RG_LVDSTX_SER_ABIST_EN BIT(24)
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#define RG_LVDSTX_SER_ABEDG_EN BIT(25)
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#define RG_LVDSTX_SER_BIST_TOG BIT(26)
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#define LVDSTX_CTL3 0x08
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#define RG_LVDSTX_VOUTABIST_EN (0x1f << 0)
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#define RG_LVDSTX_EXT_EN (0x1f << 5)
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#define RG_LVDSTX_DRV_EN (0x1f << 10)
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#define RG_LVDSTX_SER_DIN_SEL BIT(16)
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#define RG_LVDSTX_SER_CLKDIG_INV BIT(17)
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#define LVDSTX_CTL4 0x0c
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#define RG_LVDSTX_TSTPAD_EN BIT(20)
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#define RG_LVDSTX_ABIST_EN BIT(21)
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#define RG_LVDSTX_MPX_EN BIT(22)
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#define RG_LVDSTX_LDOLPF_EN BIT(23)
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#define RG_LVDSTX_TEST_BYPASSBUF BIT(24)
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#define RG_LVDSTX_BIASLPF_EN BIT(25)
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#define RG_LVDSTX_SER_ABMUX_SEL (7 << 26)
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#define RG_LVDSTX_SER_PEM_EN BIT(29)
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#define RG_LVDSTX_LVROD (3 << 30)
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#define LVDSTX_CTL5 0x10
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#define RG_LVDSTX_MIPICK_SEL BIT(4)
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#define RG_LVDSTX_INCK_SEL BIT(5)
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#define RG_LVDSTX_SWITCH_EN BIT(6)
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#define VOPLL_CTL1 0x14
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#define RG_VPLL_TXMUXDIV2_EN BIT(0)
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#define RG_VPLL_FBKSEL (3 << 6)
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#define RG_VPLL_FBKDIV (0x7f << 12)
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#define VOPLL_CTL2 0x18
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#define RG_VPLL_EN BIT(7)
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#define RG_VPLL_TXDIV1 (3 << 8)
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#define RG_VPLL_TXDIV2 (3 << 10)
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#define RG_VPLL_LVDS_EN BIT(12)
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#define RG_VPLL_LVDS_DPIX_DIV2 BIT(13)
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#define RG_VPLL_TTLDIV (3 << 16)
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#define RG_VPLL_TXDIV5_EN BIT(21)
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#define RG_VPLL_BIAS_EN BIT(24)
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#define RG_VPLL_BIASLPF_EN BIT(25)
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#define VOPLL_CTL3 0x1c
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#define LVDS_ISO_EN BIT(8)
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#define DA_LVDSTX_PWR_ON BIT(9)
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struct mtk_lvds_tx {
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struct device *dev;
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void __iomem *regs;
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void __iomem *tx1_regs;
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void __iomem *tx2_regs;
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bool dual_lvds;
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};
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static int mtk_lvds_tx_power_on_signal(struct phy *phy)
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{
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struct mtk_lvds_tx *lvds_tx = phy_get_drvdata(phy);
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u32 reg;
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dev_info(lvds_tx->dev, "%s\n", __func__);
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writel(DA_LVDSTX_PWR_ON, lvds_tx->tx1_regs + VOPLL_CTL3);
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writel(DA_LVDSTX_PWR_ON, lvds_tx->tx2_regs + VOPLL_CTL3);
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reg = RG_VPLL_TXMUXDIV2_EN | 1 << 6 | 0x1c << 12 | 1 << 20;
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if (lvds_tx->dual_lvds)
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writel(reg, lvds_tx->tx1_regs + VOPLL_CTL1);
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writel(reg, lvds_tx->tx2_regs + VOPLL_CTL1);
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reg = RG_VPLL_EN | 1 << 8 | (lvds_tx->dual_lvds ? 0 : 1) << 10 |
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RG_VPLL_LVDS_EN | RG_VPLL_LVDS_DPIX_DIV2 |
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(lvds_tx->dual_lvds ? 1 : 0) << 16 | RG_VPLL_TXDIV5_EN |
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RG_VPLL_BIAS_EN | RG_VPLL_BIASLPF_EN;
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writel(reg, lvds_tx->tx2_regs + VOPLL_CTL2);
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if (lvds_tx->dual_lvds)
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writel(reg, lvds_tx->tx1_regs + VOPLL_CTL2);
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reg = 5 | 0xb << 4 | 3 << 8 | RG_LVDSTX_TSTCLKDIV_EN |
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RG_LVDSTX_TSTCLK_EN | 1 << 16 | RG_LVDSTX_LDO_EN |
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RG_LVDSTX_BIAS_EN;
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writel(reg, lvds_tx->tx2_regs + LVDSTX_CTL2);
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if (lvds_tx->dual_lvds)
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writel(reg, lvds_tx->tx1_regs + LVDSTX_CTL2);
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reg = 0x1f << 5 | 0x1f << 10;
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writel(reg, lvds_tx->tx2_regs + LVDSTX_CTL3);
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if (lvds_tx->dual_lvds)
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writel(reg, lvds_tx->tx1_regs + LVDSTX_CTL3);
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reg = RG_LVDSTX_LDOLPF_EN | RG_LVDSTX_BIASLPF_EN;
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writel(reg, lvds_tx->tx2_regs + LVDSTX_CTL4);
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if (lvds_tx->dual_lvds)
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writel(reg, lvds_tx->tx1_regs + LVDSTX_CTL4);
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return 0;
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}
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static int mtk_lvds_tx_power_on(struct phy *phy)
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{
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mtk_lvds_tx_power_on_signal(phy);
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return 0;
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}
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static void mtk_lvds_tx_power_off_signal(struct phy *phy)
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{
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struct mtk_lvds_tx *lvds_tx = phy_get_drvdata(phy);
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u32 reg;
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dev_info(lvds_tx->dev, "%s\n", __func__);
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writel(DA_LVDSTX_PWR_ON | LVDS_ISO_EN, lvds_tx->tx1_regs + VOPLL_CTL3);
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writel(DA_LVDSTX_PWR_ON | LVDS_ISO_EN, lvds_tx->tx2_regs + VOPLL_CTL3);
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writel(0, lvds_tx->tx2_regs + VOPLL_CTL2);
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if (lvds_tx->dual_lvds)
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writel(0, lvds_tx->tx1_regs + VOPLL_CTL2);
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reg = readl(lvds_tx->tx2_regs + LVDSTX_CTL2) &
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(~(RG_LVDSTX_BIAS_EN | RG_LVDSTX_LDO_EN));
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writel(reg, lvds_tx->tx2_regs + LVDSTX_CTL2);
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if (lvds_tx->dual_lvds)
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writel(reg, lvds_tx->tx1_regs + LVDSTX_CTL2);
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writel(0, lvds_tx->tx2_regs + LVDSTX_CTL3);
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if (lvds_tx->dual_lvds)
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writel(0, lvds_tx->tx1_regs + LVDSTX_CTL3);
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}
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static int mtk_lvds_tx_power_off(struct phy *phy)
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{
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mtk_lvds_tx_power_off_signal(phy);
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return 0;
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}
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static const struct phy_ops mtk_lvds_tx_ops = {
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.power_on = mtk_lvds_tx_power_on,
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.power_off = mtk_lvds_tx_power_off,
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.owner = THIS_MODULE,
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};
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static int mtk_lvds_tx_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct mtk_lvds_tx *lvds_tx;
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struct resource *mem;
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struct phy *phy;
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struct phy_provider *phy_provider;
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int ret;
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lvds_tx = devm_kzalloc(dev, sizeof(*lvds_tx), GFP_KERNEL);
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if (!lvds_tx)
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return -ENOMEM;
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lvds_tx->dual_lvds = of_property_read_bool(dev->of_node,
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"mediatek,dual-channel");
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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lvds_tx->tx1_regs = devm_ioremap_resource(dev, mem);
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if (IS_ERR(lvds_tx->tx1_regs)) {
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ret = PTR_ERR(lvds_tx->tx1_regs);
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dev_err(dev, "Failed to get lvds1 memory resource: %d\n", ret);
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return ret;
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}
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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lvds_tx->tx2_regs = devm_ioremap_resource(dev, mem);
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if (IS_ERR(lvds_tx->tx2_regs)) {
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ret = PTR_ERR(lvds_tx->tx2_regs);
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dev_err(dev, "Failed to get lvds2 memory resource: %d\n", ret);
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return ret;
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}
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writel(DA_LVDSTX_PWR_ON | LVDS_ISO_EN, lvds_tx->tx1_regs + VOPLL_CTL3);
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writel(DA_LVDSTX_PWR_ON | LVDS_ISO_EN, lvds_tx->tx2_regs + VOPLL_CTL3);
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phy = devm_phy_create(dev, NULL, &mtk_lvds_tx_ops);
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if (IS_ERR(phy)) {
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ret = PTR_ERR(phy);
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dev_err(dev, "Failed to create lvds D-PHY: %d\n", ret);
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return ret;
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}
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phy_set_drvdata(phy, lvds_tx);
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phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
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if (IS_ERR(phy)) {
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ret = PTR_ERR(phy_provider);
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dev_err(dev, "Failed to phy_provider: %d\n", ret);
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return ret;
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}
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lvds_tx->dev = dev;
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return 0;
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}
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static int mtk_lvds_tx_remove(struct platform_device *pdev)
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{
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of_clk_del_provider(pdev->dev.of_node);
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return 0;
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}
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static const struct of_device_id mtk_lvds_tx_match[] = {
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{ .compatible = "mediatek,mt8173-lvds-tx" },
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{},
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};
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struct platform_driver mtk_lvds_tx_driver = {
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.probe = mtk_lvds_tx_probe,
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.remove = mtk_lvds_tx_remove,
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.driver = {
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.name = "mediatek-mt8173-lvds-tx",
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.of_match_table = mtk_lvds_tx_match,
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},
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};
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