281 lines
6.9 KiB
C
281 lines
6.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <media/rc-core.h>
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#include <mt-plat/mtk_pwm.h>
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#include <mach/mtk_pwm_hal.h>
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#define DRIVER_NAME "mtk-pwm-ir-tx"
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#define DEVICE_NAME "MTK PWM IR Transmitter"
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#define IRTX_PWM_CLOCK (26000000)
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//#define IRTX_DEBUG
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struct mtk_pwm_ir {
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struct regulator *regulator;
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unsigned int pwm_ch;
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unsigned int pwm_data_invert;
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unsigned int carrier;
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unsigned int duty_cycle;
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unsigned int cycle;
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struct platform_device *pdev;
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};
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static struct pwm_spec_config irtx_pwm_config = {
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.pwm_no = 0,
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.mode = PWM_MODE_MEMORY,
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.clk_div = CLK_DIV1,
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.clk_src = PWM_CLK_NEW_MODE_BLOCK,
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.pmic_pad = 0,
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.PWM_MODE_MEMORY_REGS.IDLE_VALUE = IDLE_FALSE,
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.PWM_MODE_MEMORY_REGS.GUARD_VALUE = GUARD_FALSE,
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.PWM_MODE_MEMORY_REGS.STOP_BITPOS_VALUE = 31,
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/* 1 microseconds, assume clock source is 26M */
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.PWM_MODE_MEMORY_REGS.HDURATION = 229,
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.PWM_MODE_MEMORY_REGS.LDURATION = 229,
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.PWM_MODE_MEMORY_REGS.GDURATION = 0,
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.PWM_MODE_MEMORY_REGS.WAVE_NUM = 1,
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};
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static int mtk_pwm_ir_tx(struct rc_dev *rcdev, unsigned int *txbuf,
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unsigned int count)
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{
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struct mtk_pwm_ir *pwm_ir = rcdev->priv;
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dma_addr_t wave_phy;
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unsigned int *wave_vir;
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int ret, i, h_l_period, cycle_unit_us;
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int buf_size = 0;
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int total_time = 0;
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int len = 0;
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int cur_bit = 0;
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int regulator_enabled = 0;
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#ifdef IRTX_DEBUG
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static char logbuf[4096];
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int cur_idx = 0;
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char *dbglog = logbuf;
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#endif
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pr_info("%s() irtx len=0x%x, pwm=%d\n", __func__,
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(unsigned int)count, (unsigned int)pwm_ir->pwm_ch);
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/* lirc txbuf is odd, consumerir will append a "1" at last
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* if original pattern_len is even.
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*/
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if ((count > 0) && (txbuf[count-1] == 1))
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count--;
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if (count == 0)
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return 0;
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// pwm_ir.cycle: whole cycle, pwm_ir.duty_cycle: high period
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h_l_period = DIV_ROUND_UP(IRTX_PWM_CLOCK*pwm_ir->duty_cycle,
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pwm_ir->carrier*pwm_ir->cycle);
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cycle_unit_us = DIV_ROUND_UP(NSEC_PER_SEC/1000*pwm_ir->duty_cycle,
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pwm_ir->carrier*pwm_ir->cycle);
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for (i = 0; i < count; i++) {
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buf_size += ALIGN(DIV_ROUND_UP(txbuf[i], cycle_unit_us), pwm_ir->cycle);
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total_time += txbuf[i];
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}
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buf_size = ALIGN(buf_size, BITS_PER_BYTE * sizeof(unsigned int));
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buf_size = buf_size / BITS_PER_BYTE; /* byte size */
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wave_vir = (unsigned int *) dma_alloc_coherent(&pwm_ir->pdev->dev, buf_size,
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&wave_phy, GFP_KERNEL);
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if (!wave_vir) {
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pr_notice("%s() IRTX alloc memory fail\n", __func__);
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return -ENOMEM;
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}
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memset(wave_vir, 0, buf_size);
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/* convert the pulse/space signal to raw binary signal */
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cur_bit = 0;
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for (i = 0; i < count; i++) {
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unsigned int periods;
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int j, cur_cycle = 0;
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periods = ALIGN(DIV_ROUND_UP(txbuf[i], cycle_unit_us), pwm_ir->cycle);
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for (j = 0; j < periods; j++) {
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cur_cycle = (j % pwm_ir->cycle)+1;
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if (cur_cycle > pwm_ir->duty_cycle || (i % 2)) {
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if (pwm_ir->pwm_data_invert)
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wave_vir[len] |= (1 << cur_bit);
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else
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wave_vir[len] &= ~(1 << cur_bit);
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} else {
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if (pwm_ir->pwm_data_invert)
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wave_vir[len] &= ~(1 << cur_bit);
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else
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wave_vir[len] |= (1 << cur_bit);
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}
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cur_bit++;
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if (cur_bit == 32) {
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cur_bit = 0;
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len++;
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}
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}
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}
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if (cur_bit > 0)
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len++;
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irtx_pwm_config.pwm_no = (unsigned int)pwm_ir->pwm_ch;
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irtx_pwm_config.PWM_MODE_MEMORY_REGS.HDURATION = h_l_period-1;
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irtx_pwm_config.PWM_MODE_MEMORY_REGS.LDURATION = h_l_period-1;
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irtx_pwm_config.PWM_MODE_MEMORY_REGS.BUF0_BASE_ADDR = wave_phy;
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irtx_pwm_config.PWM_MODE_MEMORY_REGS.BUF0_SIZE = len;
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#ifdef IRTX_DEBUG
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dbglog = logbuf;
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pr_info("h_l_period = %d, cycle_unit_us = %d\n",
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h_l_period, cycle_unit_us);
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pr_info("irtx len = %d, buf_size = %d, total_time = %d\n",
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len, buf_size, total_time);
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for (i = 0; i < len; i++) {
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if (i && (i % 16 == 0)) {
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pr_info("[%d] %s\n", cur_idx++, logbuf);
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memset(logbuf, 0, sizeof(logbuf));
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dbglog = logbuf;
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}
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dbglog += sprintf(dbglog, "0x%08x ", wave_vir[i]);
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}
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if (dbglog != logbuf)
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pr_info("[%d] %s\n", cur_idx++, logbuf);
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#endif
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if (pwm_ir->regulator != NULL) {
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if (!regulator_is_enabled(pwm_ir->regulator)) {
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ret = regulator_enable(pwm_ir->regulator);
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if (ret < 0) {
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pr_err("%s:%d regulator_enable fail!\n",
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__func__, __LINE__);
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goto exit_free;
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} else {
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regulator_enabled = 1;
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}
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}
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}
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ret = pwm_set_spec_config(&irtx_pwm_config);
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if (ret < 0) {
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pr_err("pwm_set_spec_config fail, ret: %d\n", ret);
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goto exit_free;
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}
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usleep_range(total_time, total_time + 100);
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pr_info("[IRTX] done, clean up\n");
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mt_pwm_disable(irtx_pwm_config.pwm_no, irtx_pwm_config.pmic_pad);
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if (pwm_ir->regulator != NULL) {
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if (regulator_enabled && regulator_is_enabled(pwm_ir->regulator)) {
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ret = regulator_disable(pwm_ir->regulator);
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if (ret < 0) {
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pr_err("%s:%d regulator_disable fail!\n",
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__func__, __LINE__);
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goto exit_free;
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}
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}
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}
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ret = count;
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exit_free:
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dma_free_coherent(&pwm_ir->pdev->dev, buf_size, wave_vir, wave_phy);
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return ret;
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}
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static int mtk_pwm_ir_set_duty_cycle(struct rc_dev *dev, u32 duty_cycle)
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{
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struct mtk_pwm_ir *pwm_ir = dev->priv;
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if (duty_cycle < 40) {
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pwm_ir->cycle = 3;
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pwm_ir->duty_cycle = 1;
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}
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return 0;
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}
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static int mtk_pwm_ir_set_carrier(struct rc_dev *dev, u32 carrier)
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{
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struct mtk_pwm_ir *pwm_ir = dev->priv;
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if (!carrier)
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return -EINVAL;
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pwm_ir->carrier = carrier;
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return 0;
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}
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static int mtk_pwm_ir_probe(struct platform_device *pdev)
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{
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struct mtk_pwm_ir *pwm_ir;
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struct rc_dev *rcdev;
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int rc;
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pwm_ir = devm_kmalloc(&pdev->dev, sizeof(*pwm_ir), GFP_KERNEL);
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if (!pwm_ir)
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return -ENOMEM;
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of_property_read_u32(pdev->dev.of_node, "pwm_ch",
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&pwm_ir->pwm_ch);
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of_property_read_u32(pdev->dev.of_node, "pwm_data_invert",
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&pwm_ir->pwm_data_invert);
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pwm_ir->regulator = devm_regulator_get(&pdev->dev, "vio28");
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if (IS_ERR(pwm_ir->regulator))
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return PTR_ERR(pwm_ir->regulator);
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pwm_ir->pdev = pdev;
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rc = regulator_set_voltage(pwm_ir->regulator, 2800000, 2800000);
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if (rc < 0)
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return rc;
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rcdev = devm_rc_allocate_device(&pdev->dev, RC_DRIVER_IR_RAW_TX);
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if (!rcdev)
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return -ENOMEM;
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rcdev->priv = pwm_ir;
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rcdev->driver_name = DRIVER_NAME;
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rcdev->device_name = DEVICE_NAME;
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rcdev->tx_ir = mtk_pwm_ir_tx;
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rcdev->s_tx_duty_cycle = mtk_pwm_ir_set_duty_cycle;
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rcdev->s_tx_carrier = mtk_pwm_ir_set_carrier;
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rc = devm_rc_register_device(&pdev->dev, rcdev);
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if (rc < 0)
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dev_err(&pdev->dev, "failed to register rc device\n");
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return rc;
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}
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static const struct of_device_id mtk_pwm_ir_of_match[] = {
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{.compatible = "mediatek,irtx-pwm",},
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{}
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};
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static struct platform_driver pwm_ir_driver = {
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.probe = mtk_pwm_ir_probe,
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.driver = {
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.name = DRIVER_NAME,
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.of_match_table = of_match_ptr(mtk_pwm_ir_of_match),
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},
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};
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module_platform_driver(pwm_ir_driver);
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MODULE_DESCRIPTION("MTK PWM IR Transmitter");
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MODULE_AUTHOR("Chang-An Chen <chang-an.chen@mediatek.com>");
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MODULE_LICENSE("GPL");
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