82 lines
2.8 KiB
C
82 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef _DT_BINDINGS_MT6357_IRQ_H
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#define _DT_BINDINGS_MT6357_IRQ_H
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#define SP_BUCK 0
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#define SP_LDO 1
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#define SP_PSC 2
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#define SP_SCK 3
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#define SP_BM 4
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#define SP_HK 5
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#define SP_AUD 6
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#define SP_MISC 7
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#define INT_VPROC_OC 0
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#define INT_VCORE_OC 1
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#define INT_VMODEM_OC 2
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#define INT_VS1_OC 3
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#define INT_VPA_OC 4
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#define INT_VCORE_PREOC 5
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#define INT_VFE28_OC 16
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#define INT_VXO22_OC 17
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#define INT_VRF18_OC 18
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#define INT_VRF12_OC 19
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#define INT_VEFUSE_OC 20
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#define INT_VCN33_OC 21
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#define INT_VCN28_OC 22
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#define INT_VCN18_OC 23
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#define INT_VCAMA_OC 24
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#define INT_VCAMD_OC 25
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#define INT_VCAMIO_OC 26
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#define INT_VLDO28_OC 27
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#define INT_VUSB33_OC 28
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#define INT_VAUX18_OC 29
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#define INT_VAUD28_OC 30
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#define INT_VIO28_OC 31
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#define INT_VIO18_OC 32
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#define INT_VSRAM_PROC_OC 33
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#define INT_VSRAM_OTHERS_OC 34
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#define INT_VIBR_OC 35
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#define INT_VDRAM_OC 36
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#define INT_VMC_OC 37
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#define INT_VMCH_OC 38
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#define INT_VEMC_OC 39
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#define INT_VSIM1_OC 40
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#define INT_VSIM2_OC 41
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#define INT_PWRKEY 48
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#define INT_HOMEKEY 49
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#define INT_PWRKEY_R 50
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#define INT_HOMEKEY_R 51
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#define INT_NI_LBAT_INT 52
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#define INT_CHRDET 53
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#define INT_CHRDET_EDGE 54
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#define INT_VCDT_HV_DET 55
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#define INT_WATCHDOG 58
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#define INT_VBATON_UNDET 59
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#define INT_BVALID_DET 60
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#define INT_OV 61
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#define INT_RTC 64
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#define INT_FG_BAT0_H 80
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#define INT_FG_BAT0_L 81
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#define INT_FG_CUR_H 82
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#define INT_FG_CUR_L 83
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#define INT_FG_ZCV 84
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#define INT_BATON_LV 96
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#define INT_BATON_HT 97
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#define INT_BAT_H 114
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#define INT_BAT_L 115
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#define INT_AUXADC_IMP 120
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#define INT_NAG_C_DLTV 121
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#define INT_AUDIO 128
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#define INT_ACCDET 133
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#define INT_ACCDET_EINT0 134
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#define INT_ACCDET_EINT1 135
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#define INT_SPI_CMD_ALERT 144
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#endif /* _DT_BINDINGS_MT6357_IRQ_H */
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