307 lines
12 KiB
C
307 lines
12 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2018 MediaTek Inc.
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*/
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/*******************************************************************************
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*
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* Filename:
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* ---------
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* AudDrv_Ana.h
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*
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* Project:
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* --------
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* Audio Driver Ana
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*
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* Description:
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* ------------
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* Audio register
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*
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* Author:
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* -------
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* Chipeng Chang (mtk02308)
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*
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*------------------------------------------------------------------------------
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*
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*
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******************************************************************************/
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#ifndef _AUDDRV_ANA_H_
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#define _AUDDRV_ANA_H_
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/*****************************************************************************
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* C O M P I L E R F L A G S
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*****************************************************************************/
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/*****************************************************************************
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* E X T E R N A L R E F E R E N C E S
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*****************************************************************************/
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#include "mtk-auddrv-def.h"
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/*****************************************************************************
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* D A T A T Y P E S
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*****************************************************************************/
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/*****************************************************************************
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* M A C R O
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*****************************************************************************/
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/*****************************************************************************
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* R E G I S T E R D E F I N I T I O N
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*****************************************************************************/
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#define SWCID 0x000A
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#define AUD_TOP_ID 0x2200
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#define AUD_TOP_REV0 0x2202
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#define AUD_TOP_DBI 0x2204
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#define AUD_TOP_DXI 0x2206
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#define AUD_TOP_CKPDN_TPM0 0x2208
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#define AUD_TOP_CKPDN_TPM1 0x220a
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#define AUD_TOP_CKPDN_CON0 0x220c
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#define AUD_TOP_CKPDN_CON0_SET 0x220e
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#define AUD_TOP_CKPDN_CON0_CLR 0x2210
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#define AUD_TOP_CKSEL_CON0 0x2212
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#define AUD_TOP_CKSEL_CON0_SET 0x2214
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#define AUD_TOP_CKSEL_CON0_CLR 0x2216
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#define AUD_TOP_CKTST_CON0 0x2218
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#define AUD_TOP_CLK_HWEN_CON0 0x221a
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#define AUD_TOP_CLK_HWEN_CON0_SET 0x221c
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#define AUD_TOP_CLK_HWEN_CON0_CLR 0x221e
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#define AUD_TOP_RST_CON0 0x2220
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#define AUD_TOP_RST_CON0_SET 0x2222
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#define AUD_TOP_RST_CON0_CLR 0x2224
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#define AUD_TOP_RST_BANK_CON0 0x2226
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#define AUD_TOP_INT_CON0 0x2228
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#define AUD_TOP_INT_CON0_SET 0x222a
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#define AUD_TOP_INT_CON0_CLR 0x222c
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#define AUD_TOP_INT_MASK_CON0 0x222e
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#define AUD_TOP_INT_MASK_CON0_SET 0x2230
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#define AUD_TOP_INT_MASK_CON0_CLR 0x2232
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#define AUD_TOP_INT_STATUS0 0x2234
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#define AUD_TOP_INT_RAW_STATUS0 0x2236
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#define AUD_TOP_INT_MISC_CON0 0x2238
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#define AUDNCP_CLKDIV_CON0 0x223a
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#define AUDNCP_CLKDIV_CON1 0x223c
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#define AUDNCP_CLKDIV_CON2 0x223e
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#define AUDNCP_CLKDIV_CON3 0x2240
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#define AUDNCP_CLKDIV_CON4 0x2242
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#define AUD_TOP_MON_CON0 0x2244
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#define AUDIO_DIG_DSN_ID 0x2280
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#define AUDIO_DIG_DSN_REV0 0x2282
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#define AUDIO_DIG_DSN_DBI 0x2284
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#define AUDIO_DIG_DSN_DXI 0x2286
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#define AFE_UL_DL_CON0 0x2288
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#define AFE_DL_SRC2_CON0_L 0x228a
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#define AFE_UL_SRC_CON0_H 0x228c
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#define AFE_UL_SRC_CON0_L 0x228e
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#define PMIC_AFE_TOP_CON0 0x2290
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#define PMIC_AUDIO_TOP_CON0 0x2292
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#define AFE_MON_DEBUG0 0x2294
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#define AFUNC_AUD_CON0 0x2296
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#define AFUNC_AUD_CON1 0x2298
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#define AFUNC_AUD_CON2 0x229a
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#define AFUNC_AUD_CON3 0x229c
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#define AFUNC_AUD_CON4 0x229e
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#define AFUNC_AUD_CON5 0x22a0
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#define AFUNC_AUD_CON6 0x22a2
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#define AFUNC_AUD_MON0 0x22a4
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#define AUDRC_TUNE_MON0 0x22a6
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#define AFE_ADDA_MTKAIF_FIFO_CFG0 0x22a8
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#define AFE_ADDA_MTKAIF_FIFO_LOG_MON1 0x22aa
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#define PMIC_AFE_ADDA_MTKAIF_MON0 0x22ac
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#define PMIC_AFE_ADDA_MTKAIF_MON1 0x22ae
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#define PMIC_AFE_ADDA_MTKAIF_MON2 0x22b0
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#define PMIC_AFE_ADDA_MTKAIF_MON3 0x22b2
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#define PMIC_AFE_ADDA_MTKAIF_CFG0 0x22b4
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#define PMIC_AFE_ADDA_MTKAIF_RX_CFG0 0x22b6
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#define PMIC_AFE_ADDA_MTKAIF_RX_CFG1 0x22b8
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#define PMIC_AFE_ADDA_MTKAIF_RX_CFG2 0x22ba
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#define PMIC_AFE_ADDA_MTKAIF_RX_CFG3 0x22bc
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#define PMIC_AFE_ADDA_MTKAIF_TX_CFG1 0x22be
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#define AFE_SGEN_CFG0 0x22c0
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#define AFE_SGEN_CFG1 0x22c2
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#define AFE_ADC_ASYNC_FIFO_CFG 0x22c4
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#define AFE_DCCLK_CFG0 0x22c6
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#define AFE_DCCLK_CFG1 0x22c8
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#define AUDIO_DIG_CFG 0x22ca
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#define AFE_AUD_PAD_TOP 0x22cc
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#define AFE_AUD_PAD_TOP_MON 0x22ce
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#define AFE_AUD_PAD_TOP_MON1 0x22d0
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#define AFE_DL_NLE_CFG 0x22d2
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#define AFE_DL_NLE_MON 0x22d4
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#define AFE_CG_EN_MON 0x22d6
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#define AUDIO_DIG_2ND_DSN_ID 0x2300
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#define AUDIO_DIG_2ND_DSN_REV0 0x2302
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#define AUDIO_DIG_2ND_DSN_DBI 0x2304
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#define AUDIO_DIG_2ND_DSN_DXI 0x2306
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#define AFE_PMIC_NEWIF_CFG3 0x2308
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#define AFE_VOW_TOP 0x230a
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#define AFE_VOW_CFG0 0x230c
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#define AFE_VOW_CFG1 0x230e
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#define AFE_VOW_CFG2 0x2310
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#define AFE_VOW_CFG3 0x2312
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#define AFE_VOW_CFG4 0x2314
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#define AFE_VOW_CFG5 0x2316
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#define AFE_VOW_CFG6 0x2318
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#define AFE_VOW_MON0 0x231a
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#define AFE_VOW_MON1 0x231c
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#define AFE_VOW_MON2 0x231e
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#define AFE_VOW_MON3 0x2320
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#define AFE_VOW_MON4 0x2322
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#define AFE_VOW_MON5 0x2324
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#define AFE_VOW_SN_INI_CFG 0x2326
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#define AFE_VOW_TGEN_CFG0 0x2328
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#define AFE_VOW_POSDIV_CFG0 0x232a
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#define AFE_VOW_HPF_CFG0 0x232c
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#define AFE_VOW_PERIODIC_CFG0 0x232e
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#define AFE_VOW_PERIODIC_CFG1 0x2330
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#define AFE_VOW_PERIODIC_CFG2 0x2332
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#define AFE_VOW_PERIODIC_CFG3 0x2334
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#define AFE_VOW_PERIODIC_CFG4 0x2336
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#define AFE_VOW_PERIODIC_CFG5 0x2338
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#define AFE_VOW_PERIODIC_CFG6 0x233a
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#define AFE_VOW_PERIODIC_CFG7 0x233c
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#define AFE_VOW_PERIODIC_CFG8 0x233e
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#define AFE_VOW_PERIODIC_CFG9 0x2340
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#define AFE_VOW_PERIODIC_CFG10 0x2342
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#define AFE_VOW_PERIODIC_CFG11 0x2344
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#define AFE_VOW_PERIODIC_CFG12 0x2346
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#define AFE_VOW_PERIODIC_CFG13 0x2348
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#define AFE_VOW_PERIODIC_CFG14 0x234a
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#define AFE_VOW_PERIODIC_CFG15 0x234c
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#define AFE_VOW_PERIODIC_CFG16 0x234e
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#define AFE_VOW_PERIODIC_CFG17 0x2350
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#define AFE_VOW_PERIODIC_CFG18 0x2352
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#define AFE_VOW_PERIODIC_CFG19 0x2354
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#define AFE_VOW_PERIODIC_CFG20 0x2356
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#define AFE_VOW_PERIODIC_CFG21 0x2358
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#define AFE_VOW_PERIODIC_CFG22 0x235a
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#define AFE_VOW_PERIODIC_CFG23 0x235c
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#define AFE_VOW_PERIODIC_MON0 0x235e
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#define AFE_VOW_PERIODIC_MON1 0x2360
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#define AUDENC_DSN_ID 0x2380
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#define AUDENC_DSN_REV0 0x2382
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#define AUDENC_DSN_DBI 0x2384
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#define AUDENC_DSN_FPI 0x2386
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#define AUDENC_ANA_CON0 0x2388
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#define AUDENC_ANA_CON1 0x238a
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#define AUDENC_ANA_CON2 0x238c
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#define AUDENC_ANA_CON3 0x238e
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#define AUDENC_ANA_CON4 0x2390
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#define AUDENC_ANA_CON5 0x2392
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#define AUDENC_ANA_CON6 0x2394
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#define AUDENC_ANA_CON7 0x2396
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#define AUDENC_ANA_CON8 0x2398
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#define AUDENC_ANA_CON9 0x239a
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#define AUDENC_ANA_CON10 0x239c
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#define AUDENC_ANA_CON11 0x239e
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#define AUDENC_ANA_CON12 0x23a0
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#define AUDDEC_DSN_ID 0x2400
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#define AUDDEC_DSN_REV0 0x2402
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#define AUDDEC_DSN_DBI 0x2404
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#define AUDDEC_DSN_FPI 0x2406
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#define AUDDEC_ANA_CON0 0x2408
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#define AUDDEC_ANA_CON1 0x240a
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#define AUDDEC_ANA_CON2 0x240c
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#define AUDDEC_ANA_CON3 0x240e
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#define AUDDEC_ANA_CON4 0x2410
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#define AUDDEC_ANA_CON5 0x2412
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#define AUDDEC_ANA_CON6 0x2414
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#define AUDDEC_ANA_CON7 0x2416
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#define AUDDEC_ANA_CON8 0x2418
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#define AUDDEC_ANA_CON9 0x241a
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#define AUDDEC_ANA_CON10 0x241c
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#define AUDDEC_ANA_CON11 0x241e
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#define AUDDEC_ANA_CON12 0x2420
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#define AUDDEC_ANA_CON13 0x2422
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#define AUDDEC_ANA_CON14 0x2424
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#define AUDDEC_ANA_CON15 0x2426
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#define AUDDEC_ELR_NUM 0x2428
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#define AUDDEC_ELR_0 0x242a
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#define AUDZCD_DSN_ID 0x2480
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#define AUDZCD_DSN_REV0 0x2482
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#define AUDZCD_DSN_DBI 0x2484
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#define AUDZCD_DSN_FPI 0x2486
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#define ZCD_CON0 0x2488
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#define ZCD_CON1 0x248a
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#define ZCD_CON2 0x248c
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#define ZCD_CON3 0x248e
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#define ZCD_CON4 0x2490
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#define ZCD_CON5 0x2492
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#define ACCDET_DSN_DIG_ID 0x2500
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#define ACCDET_DSN_DIG_REV0 0x2502
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#define ACCDET_DSN_DBI 0x2504
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#define ACCDET_DSN_FPI 0x2506
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#define ACCDET_CON0 0x2508
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#define ACCDET_CON1 0x250a
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#define ACCDET_CON2 0x250c
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#define ACCDET_CON3 0x250e
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#define ACCDET_CON4 0x2510
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#define ACCDET_CON5 0x2512
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#define ACCDET_CON6 0x2514
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#define ACCDET_CON7 0x2516
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#define ACCDET_CON8 0x2518
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#define ACCDET_CON9 0x251a
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#define ACCDET_CON10 0x251c
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#define ACCDET_CON11 0x251e
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#define ACCDET_CON12 0x2520
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#define ACCDET_CON13 0x2522
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#define ACCDET_CON14 0x2524
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#define ACCDET_CON15 0x2526
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#define ACCDET_CON16 0x2528
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#define ACCDET_CON17 0x252a
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#define ACCDET_CON18 0x252c
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#define ACCDET_CON19 0x252e
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#define ACCDET_CON20 0x2530
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#define ACCDET_CON21 0x2532
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#define ACCDET_CON22 0x2534
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#define ACCDET_CON23 0x2536
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#define ACCDET_CON24 0x2538
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#define ACCDET_CON25 0x253a
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#define ACCDET_CON26 0x253c
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#define ACCDET_CON27 0x253e
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#define ACCDET_CON28 0x2540
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#define TOP_CKPDN_CON0 0x10c
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#define TOP_CKPDN_CON0_SET 0x10e
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#define TOP_CKPDN_CON0_CLR 0x110
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#define TOP_CKHWEN_CON0 0x12a
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#define TOP_CKHWEN_CON0_SET 0x12c
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#define TOP_CKHWEN_CON0_CLR 0x12e
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#define OTP_CON0 0x38a
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#define OTP_CON8 0x39a
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#define OTP_CON11 0x3a0
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#define OTP_CON12 0x3a2
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#define OTP_CON13 0x3a4
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#define SMT_CON1 0x30
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#define DRV_CON3 0x3c
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#define GPIO_DIR0 0x88
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#define GPIO_MODE2 0xd8 /* mosi */
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#define GPIO_MODE2_SET 0xda
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#define GPIO_MODE2_CLR 0xdc
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#define GPIO_MODE3 0xde /* miso */
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#define GPIO_MODE3_SET 0xe0
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#define GPIO_MODE3_CLR 0xe2
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#define DCXO_CW13 0x7aa
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#define DCXO_CW14 0x7ac
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#define AUXADC_CON1 0x118e
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#define AUXADC_CON10 0x11a0
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void Ana_Set_Reg(unsigned int offset, unsigned int value, unsigned int mask);
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unsigned int Ana_Get_Reg(unsigned int offset);
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/* for debug usage */
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void Ana_Log_Print(void);
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int Ana_Debug_Read(char *buffer, const int size);
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#endif
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