718 lines
20 KiB
C
718 lines
20 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Michael Hsiao <michael.hsiao@mediatek.com>
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*/
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/*******************************************************************************
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*
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* Filename:
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* ---------
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* mt_soc_pcm_I2S0dl1.c
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*
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* Project:
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* --------
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* Audio Driver Kernel Function
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*
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* Description:
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* ------------
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* Audio I2S0dl1 and Dl1 playback
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*
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* Author:
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* -------
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* Chipeng Chang
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*
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*------------------------------------------------------------------------------
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*
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*
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******************************************************************************
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*/
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/*****************************************************************************
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* C O M P I L E R F L A G S
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*****************************************************************************/
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/*****************************************************************************
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* E X T E R N A L R E F E R E N C E S
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*****************************************************************************/
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#include <linux/dma-mapping.h>
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#include <sound/pcm_params.h>
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#include "mtk-auddrv-afe.h"
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#include "mtk-auddrv-ana.h"
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#include "mtk-auddrv-clk.h"
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#include "mtk-auddrv-common.h"
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#include "mtk-auddrv-def.h"
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#include "mtk-auddrv-kernel.h"
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#include "mtk-soc-afe-control.h"
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#include "mtk-soc-pcm-common.h"
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#include "mtk-soc-pcm-platform.h"
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static struct afe_mem_control_t *pI2S0dl1MemControl;
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static struct snd_dma_buffer Dl1I2S0_Playback_dma_buf;
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static unsigned int mPlaybackDramState;
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static bool vcore_dvfs_enable;
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/*
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* function implementation
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*/
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static int mtk_I2S0dl1_probe(struct platform_device *pdev);
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static int mtk_pcm_I2S0dl1_close(struct snd_pcm_substream *substream);
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static int mtk_afe_I2S0dl1_component_probe(struct snd_soc_component *component);
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static int mI2S0dl1_hdoutput_control;
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static bool mPrepareDone;
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static int mI2S0dl1_wgain;
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static unsigned int m_hw_volume = 0x10000;
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static const void *irq_user_id;
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static unsigned int irq1_cnt;
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static struct device *mDev;
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const char *const I2S0dl1_HD_output[] = {"Off", "On"};
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const char *const I2S0dl1_WGAIN[] = {"Off", "On"};
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static const struct soc_enum Audio_I2S0dl1_Enum[] = {
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SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(I2S0dl1_HD_output), I2S0dl1_HD_output),
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SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(I2S0dl1_WGAIN), I2S0dl1_WGAIN),
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};
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static int Audio_I2S0dl1_hdoutput_Get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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pr_debug("Audio_AmpR_Get = %d\n", mI2S0dl1_hdoutput_control);
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ucontrol->value.integer.value[0] = mI2S0dl1_hdoutput_control;
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return 0;
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}
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static int Audio_I2S0dl1_hdoutput_Set(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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/* pr_debug("%s()\n", __func__); */
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if (ucontrol->value.enumerated.item[0] >
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ARRAY_SIZE(I2S0dl1_HD_output)) {
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pr_warn("%s(), return -EINVAL\n", __func__);
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return -EINVAL;
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}
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mI2S0dl1_hdoutput_control = ucontrol->value.integer.value[0];
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if (GetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_HDMI) == true) {
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pr_info("return HDMI enabled\n");
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return 0;
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}
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return 0;
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}
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static int Audio_Irqcnt1_Get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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AudDrv_Clk_On();
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ucontrol->value.integer.value[0] = Afe_Get_Reg(AFE_IRQ_MCU_CNT1);
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AudDrv_Clk_Off();
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return 0;
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}
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static int Audio_Irqcnt1_Set(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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pr_debug("%s(), irq_user_id = %p, irq1_cnt = %d, value = %ld\n",
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__func__, irq_user_id, irq1_cnt,
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ucontrol->value.integer.value[0]);
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if (irq1_cnt == ucontrol->value.integer.value[0])
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return 0;
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irq1_cnt = ucontrol->value.integer.value[0];
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AudDrv_Clk_On();
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if (irq_user_id && irq1_cnt)
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irq_update_user(irq_user_id, Soc_Aud_IRQ_MCU_MODE_IRQ1_MCU_MODE,
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0, irq1_cnt);
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else
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pr_warn("warn, cannot update irq counter, user_id = %p, irq1_cnt = %d\n",
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irq_user_id, irq1_cnt);
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AudDrv_Clk_Off();
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return 0;
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}
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static int Audio_hwgain_Get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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pr_debug("Audio_AmpR_Get = %d\n", mI2S0dl1_wgain);
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ucontrol->value.integer.value[0] = mI2S0dl1_wgain;
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return 0;
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}
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static int Audio_hwgain_Set(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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pr_debug("%s()\n", __func__);
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if (ucontrol->value.enumerated.item[0] >
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ARRAY_SIZE(I2S0dl1_WGAIN)) {
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pr_debug("%s(), return -EINVAL\n", __func__);
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return -EINVAL;
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}
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mI2S0dl1_wgain = ucontrol->value.integer.value[0];
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return 0;
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}
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static int Audio_hw_Volume_Get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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pr_debug("mfm_i2s_Volume = %d\n", m_hw_volume);
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ucontrol->value.integer.value[0] = m_hw_volume;
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return 0;
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}
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static int Audio_hw_Volume_Set(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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m_hw_volume = ucontrol->value.integer.value[0];
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pr_debug("%s mfm_i2s_Volume = 0x%x\n", __func__, m_hw_volume);
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SetHwDigitalGain(Soc_Aud_Digital_Block_HW_GAIN1, m_hw_volume);
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return 0;
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}
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static const struct snd_kcontrol_new Audio_snd_I2S0dl1_controls[] = {
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SOC_ENUM_EXT("Audio_I2S0dl1_hd_Switch", Audio_I2S0dl1_Enum[0],
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Audio_I2S0dl1_hdoutput_Get, Audio_I2S0dl1_hdoutput_Set),
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SOC_SINGLE_EXT("Audio IRQ1 CNT", SND_SOC_NOPM, 0, IRQ_MAX_RATE, 0,
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Audio_Irqcnt1_Get, Audio_Irqcnt1_Set),
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SOC_ENUM_EXT("Audio_I2S0dl1_wgain", Audio_I2S0dl1_Enum[1],
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Audio_hwgain_Get, Audio_hwgain_Set),
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SOC_SINGLE_EXT("Audio HW gain Volume", SND_SOC_NOPM, 0, 0x80000, 0,
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Audio_hw_Volume_Get, Audio_hw_Volume_Set)
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};
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static struct snd_pcm_hardware mtk_I2S0dl1_hardware = {
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.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_NO_PERIOD_WAKEUP |
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SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_RESUME |
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SNDRV_PCM_INFO_MMAP_VALID),
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.formats = SND_SOC_ADV_MT_FMTS,
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.rates = SOC_HIGH_USE_RATE,
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.rate_min = SOC_HIGH_USE_RATE_MIN,
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.rate_max = SOC_HIGH_USE_RATE_MAX,
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.channels_min = SOC_NORMAL_USE_CHANNELS_MIN,
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.channels_max = SOC_NORMAL_USE_CHANNELS_MAX,
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.buffer_bytes_max = SOC_HIFI_BUFFER_SIZE,
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.period_bytes_max = SOC_HIFI_BUFFER_SIZE,
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.periods_min = SOC_NORMAL_USE_PERIODS_MIN,
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.periods_max = SOC_NORMAL_USE_PERIODS_MAX,
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.fifo_size = 0,
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};
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static int mtk_pcm_I2S0dl1_stop(struct snd_pcm_substream *substream)
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{
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/* struct afe_block_t *Afe_Block = &(pI2S0dl1MemControl->rBlock); */
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pr_debug("%s\n", __func__);
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irq_user_id = NULL;
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irq_remove_substream_user(
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substream, irq_request_number(Soc_Aud_Digital_Block_MEM_DL1));
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SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, false);
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ClearMemBlock(Soc_Aud_Digital_Block_MEM_DL1);
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return 0;
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}
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static snd_pcm_uframes_t
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mtk_pcm_I2S0dl1_pointer(struct snd_pcm_substream *substream)
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{
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return get_mem_frame_index(substream, pI2S0dl1MemControl,
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Soc_Aud_Digital_Block_MEM_DL1);
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}
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static int mtk_pcm_I2S0dl1_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *hw_params)
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{
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int ret = 0;
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substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
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if (substream->runtime->dma_bytes <= GetPLaybackSramFullSize() &&
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!pI2S0dl1MemControl->mAssignDRAM &&
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AllocateAudioSram(&substream->runtime->dma_addr,
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&substream->runtime->dma_area,
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substream->runtime->dma_bytes, substream,
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params_format(hw_params), false) == 0) {
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SetHighAddr(Soc_Aud_Digital_Block_MEM_DL1, false,
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substream->runtime->dma_addr);
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} else {
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pr_debug("%s(), use DRAM\n", __func__);
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substream->runtime->dma_area = Dl1I2S0_Playback_dma_buf.area;
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substream->runtime->dma_addr = Dl1I2S0_Playback_dma_buf.addr;
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SetHighAddr(Soc_Aud_Digital_Block_MEM_DL1, true,
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substream->runtime->dma_addr);
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mPlaybackDramState = true;
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AudDrv_Emi_Clk_On();
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}
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set_mem_block(substream, hw_params, pI2S0dl1MemControl,
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Soc_Aud_Digital_Block_MEM_DL1);
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pr_debug("dma_bytes = %zu dma_area = %p dma_addr = 0x%lx\n",
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substream->runtime->dma_bytes, substream->runtime->dma_area,
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(long)substream->runtime->dma_addr);
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return ret;
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}
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static int mtk_pcm_I2S0dl1_hw_free(struct snd_pcm_substream *substream)
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{
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/* pr_debug("%s substream = %p\n", __func__, substream); */
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if (mPlaybackDramState == true) {
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AudDrv_Emi_Clk_Off();
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mPlaybackDramState = false;
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} else
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freeAudioSram((void *)substream);
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return 0;
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}
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static struct snd_pcm_hw_constraint_list constraints_sample_rates = {
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.count = ARRAY_SIZE(soc_high_supported_sample_rates),
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.list = soc_high_supported_sample_rates,
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/* TODO: KC: need check this!!!!!!!!!! */
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.mask = 0,
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};
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static int mtk_pcm_I2S0dl1_open(struct snd_pcm_substream *substream)
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{
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int ret = 0;
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struct snd_pcm_runtime *runtime = substream->runtime;
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mPlaybackDramState = false;
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pr_debug("%s: mtk_I2S0dl1_hardware.buffer_bytes_max = %zu mPlaybackDramState = %d\n",
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__func__, mtk_I2S0dl1_hardware.buffer_bytes_max,
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mPlaybackDramState);
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runtime->hw = mtk_I2S0dl1_hardware;
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AudDrv_Clk_On();
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memcpy((void *)(&(runtime->hw)), (void *)&mtk_I2S0dl1_hardware,
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sizeof(struct snd_pcm_hardware));
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pI2S0dl1MemControl = Get_Mem_ControlT(Soc_Aud_Digital_Block_MEM_DL1);
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ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
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&constraints_sample_rates);
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if (ret < 0) {
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pr_err("ret < 0 mtk_pcm_I2S0dl1_close\n");
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mtk_pcm_I2S0dl1_close(substream);
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return ret;
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}
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return 0;
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}
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static int mtk_pcm_I2S0dl1_close(struct snd_pcm_substream *substream)
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{
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pr_debug("%s\n", __func__);
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if (is_irq_from_ext_module()) {
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ext_sync_signal_lock();
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ext_sync_signal_unlock();
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}
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if (mPrepareDone == true) {
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if (!mI2S0dl1_wgain) {
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_MEM_DL1,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_MEM_DL1,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_MEM_DL1,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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} else {
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_MEM_DL1,
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Soc_Aud_AFE_IO_Block_HW_GAIN1_OUT);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_MEM_DL1,
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Soc_Aud_AFE_IO_Block_I2S3);
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if (GetFmI2sInPathEnable() == false) {
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_HW_GAIN1_IN,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_HW_GAIN1_IN,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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} else {
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pr_debug("%s bypass hw gain control when FM Enable(%d)\n",
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__func__, GetFmI2sInPathEnable());
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}
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}
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mI2S0dl1_wgain = 0;
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/* stop DAC output */
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SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, false);
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if (GetI2SDacEnable() == false)
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SetI2SDacEnable(false);
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/* stop I2S output */
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SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2, false);
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if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2) ==
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false)
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Afe_Set_Reg(AFE_I2S_CON3, 0x0, 0x1);
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RemoveMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1, substream);
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if (mI2S0dl1_hdoutput_control == true) {
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pr_debug("%s(), mI2S0dl1_hdoutput_control = %d\n",
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__func__, mI2S0dl1_hdoutput_control);
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/* here to close APLL */
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if (!mtk_soc_always_hd) {
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DisableAPLLTunerbySampleRate(
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substream->runtime->rate);
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DisableALLbySampleRate(
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substream->runtime->rate);
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}
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EnableI2SCLKDiv(Soc_Aud_I2S1_MCKDIV, false);
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EnableI2SCLKDiv(Soc_Aud_I2S3_MCKDIV, false);
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}
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EnableAfe(false);
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mPrepareDone = false;
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}
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irq1_cnt = 0; /* reset irq1_cnt */
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AudDrv_Clk_Off();
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vcore_dvfs(&vcore_dvfs_enable, true);
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return 0;
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}
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static int mtk_pcm_I2S0dl1_prepare(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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unsigned int u32AudioI2S = 0;
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bool mI2SWLen;
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pr_debug("%s: mPrepareDone = %d, format = %d, sample rate = %d\n",
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__func__, mPrepareDone, runtime->format,
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substream->runtime->rate);
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if (mPrepareDone == false) {
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SetMemifSubStream(Soc_Aud_Digital_Block_MEM_DL1, substream);
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if (runtime->format == SNDRV_PCM_FORMAT_S32_LE ||
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runtime->format == SNDRV_PCM_FORMAT_U32_LE) {
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SetMemIfFetchFormatPerSample(
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Soc_Aud_Digital_Block_MEM_DL1,
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AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
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SetConnectionFormat(OUTPUT_DATA_FORMAT_24BIT,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetConnectionFormat(OUTPUT_DATA_FORMAT_24BIT,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetConnectionFormat(OUTPUT_DATA_FORMAT_24BIT,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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mI2SWLen = Soc_Aud_I2S_WLEN_WLEN_32BITS;
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} else {
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SetMemIfFetchFormatPerSample(
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Soc_Aud_Digital_Block_MEM_DL1, AFE_WLEN_16_BIT);
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SetConnectionFormat(OUTPUT_DATA_FORMAT_16BIT,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetConnectionFormat(OUTPUT_DATA_FORMAT_16BIT,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetConnectionFormat(OUTPUT_DATA_FORMAT_16BIT,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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mI2SWLen = Soc_Aud_I2S_WLEN_WLEN_16BITS;
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}
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if (!mI2S0dl1_wgain) {
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_MEM_DL1,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_MEM_DL1,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_MEM_DL1,
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|
Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
|
|
} else {
|
|
SetIntfConnection(Soc_Aud_InterCon_Connection,
|
|
Soc_Aud_AFE_IO_Block_MEM_DL1,
|
|
Soc_Aud_AFE_IO_Block_HW_GAIN1_OUT);
|
|
SetIntfConnection(Soc_Aud_InterCon_Connection,
|
|
Soc_Aud_AFE_IO_Block_HW_GAIN1_IN,
|
|
Soc_Aud_AFE_IO_Block_I2S1_DAC);
|
|
SetIntfConnection(Soc_Aud_InterCon_Connection,
|
|
Soc_Aud_AFE_IO_Block_HW_GAIN1_IN,
|
|
Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
|
|
SetIntfConnection(Soc_Aud_InterCon_Connection,
|
|
Soc_Aud_AFE_IO_Block_MEM_DL1,
|
|
Soc_Aud_AFE_IO_Block_I2S3);
|
|
/* Set HW_GAIN */
|
|
SetHwDigitalGainMode(Soc_Aud_Digital_Block_HW_GAIN1,
|
|
runtime->rate, 0x40);
|
|
SetHwDigitalGainEnable(Soc_Aud_Digital_Block_HW_GAIN1,
|
|
true);
|
|
SetHwDigitalGain(Soc_Aud_Digital_Block_HW_GAIN1,
|
|
m_hw_volume);
|
|
}
|
|
/* TODO: KC: use Set2ndI2SOut() to set i2s3 */
|
|
/* I2S out Setting */
|
|
u32AudioI2S =
|
|
SampleRateTransform(runtime->rate,
|
|
Soc_Aud_Digital_Block_I2S_OUT_2)
|
|
<< 8;
|
|
u32AudioI2S |= Soc_Aud_I2S_FORMAT_I2S << 3; /* us3 I2s format */
|
|
u32AudioI2S |= mI2SWLen << 1;
|
|
|
|
if (mI2S0dl1_hdoutput_control == true) {
|
|
pr_debug("%s mI2S0dl1_hdoutput_control == %d\n",
|
|
__func__, mI2S0dl1_hdoutput_control);
|
|
|
|
/* here to open APLL */
|
|
if (!mtk_soc_always_hd) {
|
|
EnableALLbySampleRate(runtime->rate);
|
|
EnableAPLLTunerbySampleRate(runtime->rate);
|
|
}
|
|
|
|
SetCLkMclk(Soc_Aud_I2S1,
|
|
runtime->rate); /* select I2S */
|
|
SetCLkMclk(Soc_Aud_I2S3, runtime->rate);
|
|
|
|
EnableI2SCLKDiv(Soc_Aud_I2S1_MCKDIV, true);
|
|
EnableI2SCLKDiv(Soc_Aud_I2S3_MCKDIV, true);
|
|
|
|
u32AudioI2S |= Soc_Aud_LOW_JITTER_CLOCK
|
|
<< 12; /* Low jitter mode */
|
|
|
|
} else {
|
|
u32AudioI2S &= ~(Soc_Aud_LOW_JITTER_CLOCK << 12);
|
|
}
|
|
|
|
if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2) ==
|
|
false) {
|
|
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2,
|
|
true);
|
|
|
|
Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1,
|
|
AFE_MASK_ALL);
|
|
} else {
|
|
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_2,
|
|
true);
|
|
}
|
|
|
|
/* start I2S DAC out */
|
|
if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC) ==
|
|
false) {
|
|
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC,
|
|
true);
|
|
SetI2SDacOut(substream->runtime->rate,
|
|
mI2S0dl1_hdoutput_control, mI2SWLen);
|
|
SetI2SDacEnable(true);
|
|
} else {
|
|
SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC,
|
|
true);
|
|
}
|
|
|
|
EnableAfe(true);
|
|
mPrepareDone = true;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int mtk_pcm_I2S0dl1_start(struct snd_pcm_substream *substream)
|
|
{
|
|
struct snd_pcm_runtime *runtime = substream->runtime;
|
|
|
|
pr_debug("%s\n", __func__);
|
|
|
|
/* here to set interrupt */
|
|
irq_add_substream_user(
|
|
substream, irq_request_number(Soc_Aud_Digital_Block_MEM_DL1),
|
|
substream->runtime->rate,
|
|
irq1_cnt ? irq1_cnt : substream->runtime->period_size);
|
|
irq_user_id = substream;
|
|
|
|
SetSampleRate(Soc_Aud_Digital_Block_MEM_DL1, runtime->rate);
|
|
SetChannels(Soc_Aud_Digital_Block_MEM_DL1, runtime->channels);
|
|
SetMemoryPathEnable(Soc_Aud_Digital_Block_MEM_DL1, true);
|
|
|
|
EnableAfe(true);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int mtk_pcm_I2S0dl1_trigger(struct snd_pcm_substream *substream, int cmd)
|
|
{
|
|
|
|
switch (cmd) {
|
|
case SNDRV_PCM_TRIGGER_START:
|
|
case SNDRV_PCM_TRIGGER_RESUME:
|
|
return mtk_pcm_I2S0dl1_start(substream);
|
|
case SNDRV_PCM_TRIGGER_STOP:
|
|
case SNDRV_PCM_TRIGGER_SUSPEND:
|
|
return mtk_pcm_I2S0dl1_stop(substream);
|
|
}
|
|
return -EINVAL;
|
|
}
|
|
|
|
static int mtk_pcm_I2S0dl1_copy(struct snd_pcm_substream *substream,
|
|
int channel, unsigned long pos,
|
|
void __user *dst, unsigned long count)
|
|
{
|
|
vcore_dvfs(&vcore_dvfs_enable, false);
|
|
return mtk_memblk_copy(substream, channel, pos, dst, count,
|
|
pI2S0dl1MemControl,
|
|
Soc_Aud_Digital_Block_MEM_DL1);
|
|
}
|
|
|
|
static int mtk_pcm_I2S0dl1_silence(struct snd_pcm_substream *substream,
|
|
int channel,
|
|
unsigned long pos,
|
|
unsigned long bytes)
|
|
{
|
|
return 0; /* do nothing */
|
|
}
|
|
|
|
static void *dummy_page[2];
|
|
|
|
static struct page *mtk_I2S0dl1_pcm_page(struct snd_pcm_substream *substream,
|
|
unsigned long offset)
|
|
{
|
|
return virt_to_page(dummy_page[substream->stream]); /* the same page */
|
|
}
|
|
|
|
static struct snd_pcm_ops mtk_I2S0dl1_ops = {
|
|
.open = mtk_pcm_I2S0dl1_open,
|
|
.close = mtk_pcm_I2S0dl1_close,
|
|
.ioctl = snd_pcm_lib_ioctl,
|
|
.hw_params = mtk_pcm_I2S0dl1_hw_params,
|
|
.hw_free = mtk_pcm_I2S0dl1_hw_free,
|
|
.prepare = mtk_pcm_I2S0dl1_prepare,
|
|
.trigger = mtk_pcm_I2S0dl1_trigger,
|
|
.pointer = mtk_pcm_I2S0dl1_pointer,
|
|
.copy_user = mtk_pcm_I2S0dl1_copy,
|
|
.fill_silence = mtk_pcm_I2S0dl1_silence,
|
|
.page = mtk_I2S0dl1_pcm_page,
|
|
.mmap = mtk_pcm_mmap,
|
|
};
|
|
|
|
static const struct snd_soc_component_driver mtk_I2S0dl1_soc_component = {
|
|
.name = AFE_PCM_NAME,
|
|
.ops = &mtk_I2S0dl1_ops,
|
|
.probe = mtk_afe_I2S0dl1_component_probe,
|
|
};
|
|
|
|
static int mtk_I2S0dl1_probe(struct platform_device *pdev)
|
|
{
|
|
pr_debug("%s\n", __func__);
|
|
|
|
pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
|
|
if (!pdev->dev.dma_mask)
|
|
pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
|
|
|
|
if (pdev->dev.of_node)
|
|
dev_set_name(&pdev->dev, "%s", MT_SOC_I2S0DL1_PCM);
|
|
pdev->name = pdev->dev.kobj.name;
|
|
|
|
pr_debug("%s: dev name %s\n", __func__, dev_name(&pdev->dev));
|
|
|
|
mDev = &pdev->dev;
|
|
|
|
return snd_soc_register_component(&pdev->dev,
|
|
&mtk_I2S0dl1_soc_component,
|
|
NULL,
|
|
0);
|
|
}
|
|
|
|
static int mtk_afe_I2S0dl1_component_probe(struct snd_soc_component *component)
|
|
{
|
|
pr_debug("%s\n", __func__);
|
|
snd_soc_add_component_controls(component, Audio_snd_I2S0dl1_controls,
|
|
ARRAY_SIZE(Audio_snd_I2S0dl1_controls));
|
|
/* allocate dram */
|
|
Dl1I2S0_Playback_dma_buf.area = dma_alloc_coherent(
|
|
component->dev, SOC_HIFI_BUFFER_SIZE,
|
|
&Dl1I2S0_Playback_dma_buf.addr, GFP_KERNEL | GFP_DMA);
|
|
if (!Dl1I2S0_Playback_dma_buf.area)
|
|
return -ENOMEM;
|
|
|
|
Dl1I2S0_Playback_dma_buf.bytes = SOC_HIFI_BUFFER_SIZE;
|
|
pr_debug("area = %p\n", Dl1I2S0_Playback_dma_buf.area);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int mtk_I2S0dl1_remove(struct platform_device *pdev)
|
|
{
|
|
snd_soc_unregister_component(&pdev->dev);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_OF
|
|
static const struct of_device_id mt_soc_pcm_dl1_i2s0Dl1_of_ids[] = {
|
|
{
|
|
.compatible = "mediatek,mt_soc_pcm_dl1_i2s0dl1",
|
|
},
|
|
{} };
|
|
#endif
|
|
|
|
static struct platform_driver mtk_I2S0dl1_driver = {
|
|
.driver = {
|
|
|
|
.name = MT_SOC_I2S0DL1_PCM,
|
|
.owner = THIS_MODULE,
|
|
#ifdef CONFIG_OF
|
|
.of_match_table = mt_soc_pcm_dl1_i2s0Dl1_of_ids,
|
|
#endif
|
|
},
|
|
.probe = mtk_I2S0dl1_probe,
|
|
.remove = mtk_I2S0dl1_remove,
|
|
};
|
|
|
|
#ifndef CONFIG_OF
|
|
static struct platform_device *soc_mtkI2S0dl1_dev;
|
|
#endif
|
|
|
|
static int __init mtk_I2S0dl1_soc_platform_init(void)
|
|
{
|
|
int ret;
|
|
|
|
pr_debug("%s\n", __func__);
|
|
#ifndef CONFIG_OF
|
|
soc_mtkI2S0dl1_dev = platform_device_alloc(MT_SOC_I2S0DL1_PCM, -1);
|
|
if (!soc_mtkI2S0dl1_dev)
|
|
return -ENOMEM;
|
|
|
|
ret = platform_device_add(soc_mtkI2S0dl1_dev);
|
|
if (ret != 0) {
|
|
platform_device_put(soc_mtkI2S0dl1_dev);
|
|
return ret;
|
|
}
|
|
#endif
|
|
|
|
ret = platform_driver_register(&mtk_I2S0dl1_driver);
|
|
|
|
return ret;
|
|
}
|
|
module_init(mtk_I2S0dl1_soc_platform_init);
|
|
|
|
static void __exit mtk_I2S0dl1_soc_platform_exit(void)
|
|
{
|
|
platform_driver_unregister(&mtk_I2S0dl1_driver);
|
|
}
|
|
module_exit(mtk_I2S0dl1_soc_platform_exit);
|
|
|
|
MODULE_DESCRIPTION("AFE PCM module platform driver");
|
|
MODULE_LICENSE("GPL");
|