398 lines
7 KiB
ArmAsm
398 lines
7 KiB
ArmAsm
/*
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* test helper assembly functions
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*
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* Copyright (C) 2016 Simon Guo, IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <ppc-asm.h>
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#include "reg.h"
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/* Non volatile GPR - unsigned long buf[18] */
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FUNC_START(load_gpr)
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ld 14, 0*8(3)
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ld 15, 1*8(3)
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ld 16, 2*8(3)
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ld 17, 3*8(3)
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ld 18, 4*8(3)
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ld 19, 5*8(3)
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ld 20, 6*8(3)
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ld 21, 7*8(3)
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ld 22, 8*8(3)
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ld 23, 9*8(3)
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ld 24, 10*8(3)
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ld 25, 11*8(3)
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ld 26, 12*8(3)
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ld 27, 13*8(3)
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ld 28, 14*8(3)
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ld 29, 15*8(3)
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ld 30, 16*8(3)
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ld 31, 17*8(3)
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blr
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FUNC_END(load_gpr)
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FUNC_START(store_gpr)
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std 14, 0*8(3)
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std 15, 1*8(3)
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std 16, 2*8(3)
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std 17, 3*8(3)
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std 18, 4*8(3)
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std 19, 5*8(3)
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std 20, 6*8(3)
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std 21, 7*8(3)
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std 22, 8*8(3)
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std 23, 9*8(3)
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std 24, 10*8(3)
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std 25, 11*8(3)
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std 26, 12*8(3)
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std 27, 13*8(3)
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std 28, 14*8(3)
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std 29, 15*8(3)
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std 30, 16*8(3)
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std 31, 17*8(3)
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blr
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FUNC_END(store_gpr)
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/* Single Precision Float - float buf[32] */
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FUNC_START(load_fpr_single_precision)
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lfs 0, 0*4(3)
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lfs 1, 1*4(3)
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lfs 2, 2*4(3)
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lfs 3, 3*4(3)
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lfs 4, 4*4(3)
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lfs 5, 5*4(3)
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lfs 6, 6*4(3)
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lfs 7, 7*4(3)
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lfs 8, 8*4(3)
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lfs 9, 9*4(3)
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lfs 10, 10*4(3)
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lfs 11, 11*4(3)
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lfs 12, 12*4(3)
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lfs 13, 13*4(3)
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lfs 14, 14*4(3)
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lfs 15, 15*4(3)
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lfs 16, 16*4(3)
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lfs 17, 17*4(3)
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lfs 18, 18*4(3)
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lfs 19, 19*4(3)
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lfs 20, 20*4(3)
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lfs 21, 21*4(3)
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lfs 22, 22*4(3)
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lfs 23, 23*4(3)
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lfs 24, 24*4(3)
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lfs 25, 25*4(3)
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lfs 26, 26*4(3)
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lfs 27, 27*4(3)
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lfs 28, 28*4(3)
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lfs 29, 29*4(3)
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lfs 30, 30*4(3)
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lfs 31, 31*4(3)
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blr
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FUNC_END(load_fpr_single_precision)
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/* Single Precision Float - float buf[32] */
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FUNC_START(store_fpr_single_precision)
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stfs 0, 0*4(3)
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stfs 1, 1*4(3)
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stfs 2, 2*4(3)
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stfs 3, 3*4(3)
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stfs 4, 4*4(3)
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stfs 5, 5*4(3)
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stfs 6, 6*4(3)
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stfs 7, 7*4(3)
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stfs 8, 8*4(3)
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stfs 9, 9*4(3)
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stfs 10, 10*4(3)
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stfs 11, 11*4(3)
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stfs 12, 12*4(3)
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stfs 13, 13*4(3)
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stfs 14, 14*4(3)
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stfs 15, 15*4(3)
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stfs 16, 16*4(3)
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stfs 17, 17*4(3)
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stfs 18, 18*4(3)
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stfs 19, 19*4(3)
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stfs 20, 20*4(3)
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stfs 21, 21*4(3)
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stfs 22, 22*4(3)
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stfs 23, 23*4(3)
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stfs 24, 24*4(3)
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stfs 25, 25*4(3)
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stfs 26, 26*4(3)
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stfs 27, 27*4(3)
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stfs 28, 28*4(3)
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stfs 29, 29*4(3)
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stfs 30, 30*4(3)
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stfs 31, 31*4(3)
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blr
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FUNC_END(store_fpr_single_precision)
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/* VMX/VSX registers - unsigned long buf[128] */
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FUNC_START(loadvsx)
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lis 4, 0
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LXVD2X (0,(4),(3))
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addi 4, 4, 16
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LXVD2X (1,(4),(3))
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addi 4, 4, 16
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LXVD2X (2,(4),(3))
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addi 4, 4, 16
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LXVD2X (3,(4),(3))
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addi 4, 4, 16
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LXVD2X (4,(4),(3))
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addi 4, 4, 16
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LXVD2X (5,(4),(3))
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addi 4, 4, 16
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LXVD2X (6,(4),(3))
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addi 4, 4, 16
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LXVD2X (7,(4),(3))
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addi 4, 4, 16
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LXVD2X (8,(4),(3))
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addi 4, 4, 16
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LXVD2X (9,(4),(3))
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addi 4, 4, 16
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LXVD2X (10,(4),(3))
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addi 4, 4, 16
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LXVD2X (11,(4),(3))
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addi 4, 4, 16
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LXVD2X (12,(4),(3))
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addi 4, 4, 16
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LXVD2X (13,(4),(3))
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addi 4, 4, 16
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LXVD2X (14,(4),(3))
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addi 4, 4, 16
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LXVD2X (15,(4),(3))
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addi 4, 4, 16
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LXVD2X (16,(4),(3))
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addi 4, 4, 16
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LXVD2X (17,(4),(3))
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addi 4, 4, 16
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LXVD2X (18,(4),(3))
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addi 4, 4, 16
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LXVD2X (19,(4),(3))
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addi 4, 4, 16
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LXVD2X (20,(4),(3))
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addi 4, 4, 16
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LXVD2X (21,(4),(3))
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addi 4, 4, 16
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LXVD2X (22,(4),(3))
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addi 4, 4, 16
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LXVD2X (23,(4),(3))
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addi 4, 4, 16
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LXVD2X (24,(4),(3))
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addi 4, 4, 16
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LXVD2X (25,(4),(3))
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addi 4, 4, 16
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LXVD2X (26,(4),(3))
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addi 4, 4, 16
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LXVD2X (27,(4),(3))
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addi 4, 4, 16
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LXVD2X (28,(4),(3))
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addi 4, 4, 16
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LXVD2X (29,(4),(3))
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addi 4, 4, 16
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LXVD2X (30,(4),(3))
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addi 4, 4, 16
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LXVD2X (31,(4),(3))
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addi 4, 4, 16
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LXVD2X (32,(4),(3))
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addi 4, 4, 16
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LXVD2X (33,(4),(3))
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addi 4, 4, 16
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LXVD2X (34,(4),(3))
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addi 4, 4, 16
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LXVD2X (35,(4),(3))
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addi 4, 4, 16
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LXVD2X (36,(4),(3))
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addi 4, 4, 16
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LXVD2X (37,(4),(3))
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addi 4, 4, 16
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LXVD2X (38,(4),(3))
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addi 4, 4, 16
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LXVD2X (39,(4),(3))
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addi 4, 4, 16
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LXVD2X (40,(4),(3))
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addi 4, 4, 16
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LXVD2X (41,(4),(3))
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addi 4, 4, 16
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LXVD2X (42,(4),(3))
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addi 4, 4, 16
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LXVD2X (43,(4),(3))
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addi 4, 4, 16
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LXVD2X (44,(4),(3))
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addi 4, 4, 16
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LXVD2X (45,(4),(3))
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addi 4, 4, 16
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LXVD2X (46,(4),(3))
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addi 4, 4, 16
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LXVD2X (47,(4),(3))
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addi 4, 4, 16
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LXVD2X (48,(4),(3))
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addi 4, 4, 16
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LXVD2X (49,(4),(3))
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addi 4, 4, 16
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LXVD2X (50,(4),(3))
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addi 4, 4, 16
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LXVD2X (51,(4),(3))
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addi 4, 4, 16
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LXVD2X (52,(4),(3))
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addi 4, 4, 16
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LXVD2X (53,(4),(3))
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addi 4, 4, 16
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LXVD2X (54,(4),(3))
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addi 4, 4, 16
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LXVD2X (55,(4),(3))
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addi 4, 4, 16
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LXVD2X (56,(4),(3))
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addi 4, 4, 16
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LXVD2X (57,(4),(3))
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addi 4, 4, 16
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LXVD2X (58,(4),(3))
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addi 4, 4, 16
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LXVD2X (59,(4),(3))
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addi 4, 4, 16
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LXVD2X (60,(4),(3))
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addi 4, 4, 16
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LXVD2X (61,(4),(3))
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addi 4, 4, 16
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LXVD2X (62,(4),(3))
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addi 4, 4, 16
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LXVD2X (63,(4),(3))
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blr
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FUNC_END(loadvsx)
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FUNC_START(storevsx)
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lis 4, 0
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STXVD2X (0,(4),(3))
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addi 4, 4, 16
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STXVD2X (1,(4),(3))
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addi 4, 4, 16
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STXVD2X (2,(4),(3))
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addi 4, 4, 16
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STXVD2X (3,(4),(3))
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addi 4, 4, 16
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STXVD2X (4,(4),(3))
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addi 4, 4, 16
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STXVD2X (5,(4),(3))
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addi 4, 4, 16
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STXVD2X (6,(4),(3))
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addi 4, 4, 16
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STXVD2X (7,(4),(3))
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addi 4, 4, 16
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STXVD2X (8,(4),(3))
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addi 4, 4, 16
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STXVD2X (9,(4),(3))
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addi 4, 4, 16
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STXVD2X (10,(4),(3))
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addi 4, 4, 16
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STXVD2X (11,(4),(3))
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addi 4, 4, 16
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STXVD2X (12,(4),(3))
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addi 4, 4, 16
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STXVD2X (13,(4),(3))
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addi 4, 4, 16
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STXVD2X (14,(4),(3))
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addi 4, 4, 16
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STXVD2X (15,(4),(3))
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addi 4, 4, 16
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STXVD2X (16,(4),(3))
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addi 4, 4, 16
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STXVD2X (17,(4),(3))
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addi 4, 4, 16
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STXVD2X (18,(4),(3))
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addi 4, 4, 16
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STXVD2X (19,(4),(3))
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addi 4, 4, 16
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STXVD2X (20,(4),(3))
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addi 4, 4, 16
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STXVD2X (21,(4),(3))
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addi 4, 4, 16
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STXVD2X (22,(4),(3))
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addi 4, 4, 16
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STXVD2X (23,(4),(3))
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addi 4, 4, 16
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STXVD2X (24,(4),(3))
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addi 4, 4, 16
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STXVD2X (25,(4),(3))
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addi 4, 4, 16
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STXVD2X (26,(4),(3))
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addi 4, 4, 16
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STXVD2X (27,(4),(3))
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addi 4, 4, 16
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STXVD2X (28,(4),(3))
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addi 4, 4, 16
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STXVD2X (29,(4),(3))
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addi 4, 4, 16
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STXVD2X (30,(4),(3))
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addi 4, 4, 16
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STXVD2X (31,(4),(3))
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addi 4, 4, 16
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STXVD2X (32,(4),(3))
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addi 4, 4, 16
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STXVD2X (33,(4),(3))
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addi 4, 4, 16
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STXVD2X (34,(4),(3))
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addi 4, 4, 16
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STXVD2X (35,(4),(3))
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addi 4, 4, 16
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STXVD2X (36,(4),(3))
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addi 4, 4, 16
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STXVD2X (37,(4),(3))
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addi 4, 4, 16
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STXVD2X (38,(4),(3))
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addi 4, 4, 16
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STXVD2X (39,(4),(3))
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addi 4, 4, 16
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STXVD2X (40,(4),(3))
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addi 4, 4, 16
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STXVD2X (41,(4),(3))
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addi 4, 4, 16
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STXVD2X (42,(4),(3))
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addi 4, 4, 16
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STXVD2X (43,(4),(3))
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addi 4, 4, 16
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STXVD2X (44,(4),(3))
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addi 4, 4, 16
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STXVD2X (45,(4),(3))
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addi 4, 4, 16
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STXVD2X (46,(4),(3))
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addi 4, 4, 16
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STXVD2X (47,(4),(3))
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addi 4, 4, 16
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STXVD2X (48,(4),(3))
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addi 4, 4, 16
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STXVD2X (49,(4),(3))
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addi 4, 4, 16
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STXVD2X (50,(4),(3))
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addi 4, 4, 16
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STXVD2X (51,(4),(3))
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addi 4, 4, 16
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STXVD2X (52,(4),(3))
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addi 4, 4, 16
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STXVD2X (53,(4),(3))
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addi 4, 4, 16
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STXVD2X (54,(4),(3))
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addi 4, 4, 16
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STXVD2X (55,(4),(3))
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addi 4, 4, 16
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STXVD2X (56,(4),(3))
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addi 4, 4, 16
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STXVD2X (57,(4),(3))
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addi 4, 4, 16
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STXVD2X (58,(4),(3))
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addi 4, 4, 16
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STXVD2X (59,(4),(3))
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addi 4, 4, 16
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STXVD2X (60,(4),(3))
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addi 4, 4, 16
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STXVD2X (61,(4),(3))
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addi 4, 4, 16
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STXVD2X (62,(4),(3))
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addi 4, 4, 16
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STXVD2X (63,(4),(3))
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blr
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FUNC_END(storevsx)
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