6db4831e98
Android 14
241 lines
6.7 KiB
C
241 lines
6.7 KiB
C
#ifndef _ASM_POWERPC_BOOK3S_64_PGALLOC_H
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#define _ASM_POWERPC_BOOK3S_64_PGALLOC_H
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/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/slab.h>
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#include <linux/cpumask.h>
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#include <linux/kmemleak.h>
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#include <linux/percpu.h>
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struct vmemmap_backing {
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struct vmemmap_backing *list;
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unsigned long phys;
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unsigned long virt_addr;
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};
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extern struct vmemmap_backing *vmemmap_list;
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/*
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* Functions that deal with pagetables that could be at any level of
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* the table need to be passed an "index_size" so they know how to
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* handle allocation. For PTE pages (which are linked to a struct
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* page for now, and drawn from the main get_free_pages() pool), the
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* allocation size will be (2^index_size * sizeof(pointer)) and
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* allocations are drawn from the kmem_cache in PGT_CACHE(index_size).
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*
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* The maximum index size needs to be big enough to allow any
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* pagetable sizes we need, but small enough to fit in the low bits of
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* any page table pointer. In other words all pagetables, even tiny
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* ones, must be aligned to allow at least enough low 0 bits to
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* contain this value. This value is also used as a mask, so it must
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* be one less than a power of two.
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*/
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#define MAX_PGTABLE_INDEX_SIZE 0xf
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extern struct kmem_cache *pgtable_cache[];
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#define PGT_CACHE(shift) ({ \
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BUG_ON(!(shift)); \
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pgtable_cache[(shift) - 1]; \
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})
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extern pte_t *pte_fragment_alloc(struct mm_struct *, unsigned long, int);
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extern pmd_t *pmd_fragment_alloc(struct mm_struct *, unsigned long);
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extern void pte_fragment_free(unsigned long *, int);
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extern void pmd_fragment_free(unsigned long *);
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extern void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift);
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#ifdef CONFIG_SMP
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extern void __tlb_remove_table(void *_table);
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#endif
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static inline pgd_t *radix__pgd_alloc(struct mm_struct *mm)
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{
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#ifdef CONFIG_PPC_64K_PAGES
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return (pgd_t *)__get_free_page(pgtable_gfp_flags(mm, PGALLOC_GFP));
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#else
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struct page *page;
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page = alloc_pages(pgtable_gfp_flags(mm, PGALLOC_GFP | __GFP_RETRY_MAYFAIL),
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4);
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if (!page)
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return NULL;
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return (pgd_t *) page_address(page);
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#endif
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}
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static inline void radix__pgd_free(struct mm_struct *mm, pgd_t *pgd)
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{
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#ifdef CONFIG_PPC_64K_PAGES
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free_page((unsigned long)pgd);
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#else
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free_pages((unsigned long)pgd, 4);
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#endif
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}
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static inline pgd_t *pgd_alloc(struct mm_struct *mm)
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{
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pgd_t *pgd;
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if (radix_enabled())
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return radix__pgd_alloc(mm);
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pgd = kmem_cache_alloc(PGT_CACHE(PGD_INDEX_SIZE),
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pgtable_gfp_flags(mm, GFP_KERNEL));
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if (unlikely(!pgd))
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return pgd;
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/*
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* Don't scan the PGD for pointers, it contains references to PUDs but
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* those references are not full pointers and so can't be recognised by
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* kmemleak.
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*/
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kmemleak_no_scan(pgd);
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/*
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* With hugetlb, we don't clear the second half of the page table.
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* If we share the same slab cache with the pmd or pud level table,
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* we need to make sure we zero out the full table on alloc.
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* With 4K we don't store slot in the second half. Hence we don't
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* need to do this for 4k.
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*/
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#if defined(CONFIG_HUGETLB_PAGE) && defined(CONFIG_PPC_64K_PAGES) && \
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(H_PGD_INDEX_SIZE == H_PUD_CACHE_INDEX)
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memset(pgd, 0, PGD_TABLE_SIZE);
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#endif
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return pgd;
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}
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static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
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{
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if (radix_enabled())
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return radix__pgd_free(mm, pgd);
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kmem_cache_free(PGT_CACHE(PGD_INDEX_SIZE), pgd);
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}
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static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pud_t *pud)
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{
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pgd_set(pgd, __pgtable_ptr_val(pud) | PGD_VAL_BITS);
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}
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static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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pud_t *pud;
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pud = kmem_cache_alloc(PGT_CACHE(PUD_CACHE_INDEX),
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pgtable_gfp_flags(mm, GFP_KERNEL));
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/*
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* Tell kmemleak to ignore the PUD, that means don't scan it for
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* pointers and don't consider it a leak. PUDs are typically only
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* referred to by their PGD, but kmemleak is not able to recognise those
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* as pointers, leading to false leak reports.
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*/
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kmemleak_ignore(pud);
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return pud;
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}
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static inline void pud_free(struct mm_struct *mm, pud_t *pud)
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{
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kmem_cache_free(PGT_CACHE(PUD_CACHE_INDEX), pud);
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}
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static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
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{
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pud_set(pud, __pgtable_ptr_val(pmd) | PUD_VAL_BITS);
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}
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static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
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unsigned long address)
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{
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/*
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* By now all the pud entries should be none entries. So go
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* ahead and flush the page walk cache
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*/
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flush_tlb_pgtable(tlb, address);
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pgtable_free_tlb(tlb, pud, PUD_INDEX);
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}
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static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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return pmd_fragment_alloc(mm, addr);
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}
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static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
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{
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pmd_fragment_free((unsigned long *)pmd);
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}
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static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
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unsigned long address)
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{
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/*
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* By now all the pud entries should be none entries. So go
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* ahead and flush the page walk cache
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*/
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flush_tlb_pgtable(tlb, address);
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return pgtable_free_tlb(tlb, pmd, PMD_INDEX);
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}
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static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
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pte_t *pte)
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{
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pmd_set(pmd, __pgtable_ptr_val(pte) | PMD_VAL_BITS);
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}
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static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
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pgtable_t pte_page)
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{
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pmd_set(pmd, __pgtable_ptr_val(pte_page) | PMD_VAL_BITS);
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}
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static inline pgtable_t pmd_pgtable(pmd_t pmd)
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{
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return (pgtable_t)pmd_page_vaddr(pmd);
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}
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static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
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unsigned long address)
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{
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return (pte_t *)pte_fragment_alloc(mm, address, 1);
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}
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static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
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unsigned long address)
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{
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return (pgtable_t)pte_fragment_alloc(mm, address, 0);
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}
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static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
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{
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pte_fragment_free((unsigned long *)pte, 1);
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}
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static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
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{
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pte_fragment_free((unsigned long *)ptepage, 0);
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}
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static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
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unsigned long address)
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{
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/*
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* By now all the pud entries should be none entries. So go
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* ahead and flush the page walk cache
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*/
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flush_tlb_pgtable(tlb, address);
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pgtable_free_tlb(tlb, table, PTE_INDEX);
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}
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#define check_pgt_cache() do { } while (0)
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extern atomic_long_t direct_pages_count[MMU_PAGE_COUNT];
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static inline void update_page_count(int psize, long count)
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{
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if (IS_ENABLED(CONFIG_PROC_FS))
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atomic_long_add(count, &direct_pages_count[psize]);
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}
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#endif /* _ASM_POWERPC_BOOK3S_64_PGALLOC_H */
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