118 lines
2.9 KiB
C
118 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_POWERPC_CPUTHREADS_H
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#define _ASM_POWERPC_CPUTHREADS_H
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#ifndef __ASSEMBLY__
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#include <linux/cpumask.h>
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#include <asm/cpu_has_feature.h>
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/*
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* Mapping of threads to cores
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*
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* Note: This implementation is limited to a power of 2 number of
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* threads per core and the same number for each core in the system
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* (though it would work if some processors had less threads as long
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* as the CPU numbers are still allocated, just not brought online).
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*
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* However, the API allows for a different implementation in the future
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* if needed, as long as you only use the functions and not the variables
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* directly.
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*/
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#ifdef CONFIG_SMP
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extern int threads_per_core;
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extern int threads_per_subcore;
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extern int threads_shift;
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extern cpumask_t threads_core_mask;
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#else
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#define threads_per_core 1
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#define threads_per_subcore 1
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#define threads_shift 0
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#define threads_core_mask (*get_cpu_mask(0))
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#endif
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/* cpu_thread_mask_to_cores - Return a cpumask of one per cores
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* hit by the argument
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*
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* @threads: a cpumask of online threads
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*
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* This function returns a cpumask which will have one online cpu's
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* bit set for each core that has at least one thread set in the argument.
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*
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* This can typically be used for things like IPI for tlb invalidations
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* since those need to be done only once per core/TLB
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*/
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static inline cpumask_t cpu_thread_mask_to_cores(const struct cpumask *threads)
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{
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cpumask_t tmp, res;
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int i, cpu;
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cpumask_clear(&res);
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for (i = 0; i < NR_CPUS; i += threads_per_core) {
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cpumask_shift_left(&tmp, &threads_core_mask, i);
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if (cpumask_intersects(threads, &tmp)) {
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cpu = cpumask_next_and(-1, &tmp, cpu_online_mask);
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if (cpu < nr_cpu_ids)
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cpumask_set_cpu(cpu, &res);
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}
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}
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return res;
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}
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static inline int cpu_nr_cores(void)
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{
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return nr_cpu_ids >> threads_shift;
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}
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static inline cpumask_t cpu_online_cores_map(void)
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{
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return cpu_thread_mask_to_cores(cpu_online_mask);
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}
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#ifdef CONFIG_SMP
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int cpu_core_index_of_thread(int cpu);
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int cpu_first_thread_of_core(int core);
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#else
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static inline int cpu_core_index_of_thread(int cpu) { return cpu; }
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static inline int cpu_first_thread_of_core(int core) { return core; }
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#endif
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static inline int cpu_thread_in_core(int cpu)
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{
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return cpu & (threads_per_core - 1);
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}
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static inline int cpu_thread_in_subcore(int cpu)
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{
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return cpu & (threads_per_subcore - 1);
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}
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static inline int cpu_first_thread_sibling(int cpu)
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{
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return cpu & ~(threads_per_core - 1);
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}
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static inline int cpu_last_thread_sibling(int cpu)
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{
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return cpu | (threads_per_core - 1);
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}
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static inline u32 get_tensr(void)
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{
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#ifdef CONFIG_BOOKE
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if (cpu_has_feature(CPU_FTR_SMT))
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return mfspr(SPRN_TENSR);
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#endif
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return 1;
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}
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void book3e_start_thread(int thread, unsigned long addr);
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void book3e_stop_thread(int thread);
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#endif /* __ASSEMBLY__ */
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#define INVALID_THREAD_HWID 0x0fff
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#endif /* _ASM_POWERPC_CPUTHREADS_H */
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