6db4831e98
Android 14
504 lines
10 KiB
Plaintext
504 lines
10 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Support for Variscite DART-MX6 Module
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*
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* Copyright 2017 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/sound/fsl-imx-audmux.h>
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/ {
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memory@10000000 {
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reg = <0x10000000 0x40000000>;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_wl18xx_vmmc: regulator-wl18xx {
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compatible = "regulator-fixed";
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regulator-name = "vwl1807";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <70000>;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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ssi2 {
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fsl,audmux-port = <1>;
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fsl,port-config = <
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(IMX_AUDMUX_V2_PTCR_SYN |
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IMX_AUDMUX_V2_PTCR_TFSDIR |
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IMX_AUDMUX_V2_PTCR_TFSEL(2) |
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IMX_AUDMUX_V2_PTCR_TCLKDIR |
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IMX_AUDMUX_V2_PTCR_TCSEL(2))
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IMX_AUDMUX_V2_PDCR_RXDSEL(2)
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>;
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};
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aud3 {
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fsl,audmux-port = <2>;
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fsl,port-config = <
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IMX_AUDMUX_V2_PTCR_SYN
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IMX_AUDMUX_V2_PDCR_RXDSEL(1)
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>;
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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status = "disabled";
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};
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&can2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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status = "disabled";
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "disabled";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii";
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status = "disabled";
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};
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&hdmi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hdmicec>;
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ddc-i2c-bus = <&i2c1>;
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status = "disabled";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "disabled";
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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pmic@8 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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compatible = "fsl,pfuze100";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1ab {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw1c_reg: sw1c {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3a_reg: sw3a {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3950000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3b_reg: sw3b {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3950000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw4_reg: sw4 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3950000>;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen6_reg: vgen6 {
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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};
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tlv320aic3106: codec@1b {
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compatible = "ti,tlv320aic3106";
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reg = <0x1b>;
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#sound-dai-cells = <0>;
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DRVDD-supply = <®_3p3v>;
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AVDD-supply = <®_3p3v>;
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IOVDD-supply = <®_3p3v>;
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DVDD-supply = <®_3p3v>;
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ai3x-ocmv = <0>;
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gpio-reset = <&gpio5 5 GPIO_ACTIVE_LOW>;
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};
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "disabled";
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};
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&iomuxc {
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pinctrl_audmux: audmux {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
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MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
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MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
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MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
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/* Audio Clock */
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
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>;
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};
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pinctrl_bt: bt {
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fsl,pins = <
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/* Bluetooth enable */
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MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b1
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/* Bluetooth Slow Clock */
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MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
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MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
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MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
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/* SPI1 CS0 */
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MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
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/* SPI1 CS1 */
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MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
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MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
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>;
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};
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
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MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
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>;
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};
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pinctrl_hdmicec: hdmicecgrp {
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fsl,pins = <
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MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
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MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_pmic: pmicgrp {
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fsl,pins = <
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/* PMIC INT */
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MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1
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>;
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};
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pinctrl_pwm2: pwm2grp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1
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MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1
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MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
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MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
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MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
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/* WL_EN */
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MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x17071
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/* WL_IRQ */
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MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x17071
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>;
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};
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pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9
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>;
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};
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pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170F9
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100F9
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170F9
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170F9
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170F9
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170F9
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
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MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
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MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
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MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
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MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
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MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
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>;
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};
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};
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&pcie {
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fsl,tx-swing-full = <103>;
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fsl,tx-swing-low = <103>;
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reset-gpio = <&gpio4 11 GPIO_ACTIVE_LOW>;
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status = "disabled";
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};
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&pwm2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm2>;
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status = "disabled";
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};
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®_arm {
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vin-supply = <&sw1a_reg>;
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};
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®_pu {
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vin-supply = <&sw1c_reg>;
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};
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®_soc {
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vin-supply = <&sw1c_reg>;
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};
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&snvs_poweroff {
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status = "okay";
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};
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&ssi2 {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "disabled";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>;
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uart-has-rtscts;
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status = "okay";
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bluetooth {
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compatible = "ti,wl1835-st";
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enable-gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>;
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};
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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uart-has-rtscts;
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status = "disabled";
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};
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&usbh1 {
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status = "disabled";
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};
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&usbotg {
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vbus-supply = <®_usb_otg_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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disable-over-current;
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status = "disabled";
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};
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
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bus-width = <4>;
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vmmc-supply = <®_wl18xx_vmmc>;
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non-removable;
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wakeup-source;
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keep-power-in-suspend;
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cap-power-off-card;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
|
|
|
|
wlcore: wlcore@2 {
|
|
compatible = "ti,wl1835";
|
|
reg = <2>;
|
|
interrupt-parent = <&gpio6>;
|
|
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
|
|
ref-clock-frequency = <38400000>;
|
|
};
|
|
};
|
|
|
|
&usdhc2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc2>;
|
|
no-1-8-v;
|
|
keep-power-in-suspend;
|
|
wakeup-source;
|
|
status = "disabled";
|
|
};
|
|
|
|
&usdhc3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
|
non-removable;
|
|
keep-power-in-suspend;
|
|
wakeup-source;
|
|
status = "okay";
|
|
};
|