182 lines
4.9 KiB
C
182 lines
4.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* OMAP2xxx clockdomains
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*
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* Copyright (C) 2008-2009 Texas Instruments, Inc.
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* Copyright (C) 2008-2010 Nokia Corporation
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*
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* Paul Walmsley, Jouni Högander
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*
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* This file contains clockdomains and clockdomain wakeup dependencies
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* for OMAP2xxx chips. Some notes:
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*
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* A useful validation rule for struct clockdomain: Any clockdomain
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* referenced by a wkdep_srcs must have a dep_bit assigned. So
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* wkdep_srcs are really just software-controllable dependencies.
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* Non-software-controllable dependencies do exist, but they are not
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* encoded below (yet).
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*
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* 24xx does not support programmable sleep dependencies (SLEEPDEP)
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*
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* The overly-specific dep_bit names are due to a bit name collision
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* with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
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* value are the same for all powerdomains: 2
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*
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* XXX should dep_bit be a mask, so we can test to see if it is 0 as a
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* sanity check?
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* XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
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*/
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/*
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* To-Do List
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* -> Port the Sleep/Wakeup dependencies for the domains
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* from the Power domain framework
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*/
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include "soc.h"
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#include "clockdomain.h"
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#include "prm2xxx_3xxx.h"
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#include "cm2xxx_3xxx.h"
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#include "cm-regbits-24xx.h"
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#include "prm-regbits-24xx.h"
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/*
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* Clockdomain dependencies for wkdeps
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*
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* XXX Hardware dependencies (e.g., dependencies that cannot be
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* changed in software) are not included here yet, but should be.
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*/
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/* Wakeup dependency source arrays */
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/* 2430-specific possible wakeup dependencies */
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/* 2430 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP, MDM */
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static struct clkdm_dep core_2430_wkdeps[] = {
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{ .clkdm_name = "dsp_clkdm" },
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{ .clkdm_name = "gfx_clkdm" },
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{ .clkdm_name = "mpu_clkdm" },
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{ .clkdm_name = "wkup_clkdm" },
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{ .clkdm_name = "mdm_clkdm" },
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{ NULL },
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};
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/* 2430 PM_WKDEP_MPU: CORE, DSP, WKUP, MDM */
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static struct clkdm_dep mpu_2430_wkdeps[] = {
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{ .clkdm_name = "core_l3_clkdm" },
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{ .clkdm_name = "core_l4_clkdm" },
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{ .clkdm_name = "dsp_clkdm" },
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{ .clkdm_name = "wkup_clkdm" },
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{ .clkdm_name = "mdm_clkdm" },
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{ NULL },
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};
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/* 2430 PM_WKDEP_MDM: CORE, MPU, WKUP */
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static struct clkdm_dep mdm_2430_wkdeps[] = {
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{ .clkdm_name = "core_l3_clkdm" },
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{ .clkdm_name = "core_l4_clkdm" },
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{ .clkdm_name = "mpu_clkdm" },
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{ .clkdm_name = "wkup_clkdm" },
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{ NULL },
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};
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/*
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* 2430-only clockdomains
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*/
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static struct clockdomain mpu_2430_clkdm = {
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.name = "mpu_clkdm",
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.pwrdm = { .name = "mpu_pwrdm" },
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.flags = CLKDM_CAN_HWSUP_SWSUP,
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.wkdep_srcs = mpu_2430_wkdeps,
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.clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
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};
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/* Another case of bit name collisions between several registers: EN_MDM */
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static struct clockdomain mdm_clkdm = {
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.name = "mdm_clkdm",
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.pwrdm = { .name = "mdm_pwrdm" },
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.flags = CLKDM_CAN_HWSUP_SWSUP,
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.dep_bit = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT,
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.wkdep_srcs = mdm_2430_wkdeps,
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.clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK,
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};
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static struct clockdomain dsp_2430_clkdm = {
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.name = "dsp_clkdm",
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.pwrdm = { .name = "dsp_pwrdm" },
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.flags = CLKDM_CAN_HWSUP_SWSUP,
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.dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
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.wkdep_srcs = dsp_24xx_wkdeps,
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.clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
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};
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static struct clockdomain gfx_2430_clkdm = {
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.name = "gfx_clkdm",
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.pwrdm = { .name = "gfx_pwrdm" },
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.flags = CLKDM_CAN_HWSUP_SWSUP,
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.wkdep_srcs = gfx_24xx_wkdeps,
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.clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
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};
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/*
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* XXX add usecounting for clkdm dependencies, otherwise the presence
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* of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
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* could cause trouble
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*/
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static struct clockdomain core_l3_2430_clkdm = {
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.name = "core_l3_clkdm",
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.pwrdm = { .name = "core_pwrdm" },
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.flags = CLKDM_CAN_HWSUP,
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.dep_bit = OMAP24XX_EN_CORE_SHIFT,
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.wkdep_srcs = core_2430_wkdeps,
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.clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
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};
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/*
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* XXX add usecounting for clkdm dependencies, otherwise the presence
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* of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
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* could cause trouble
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*/
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static struct clockdomain core_l4_2430_clkdm = {
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.name = "core_l4_clkdm",
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.pwrdm = { .name = "core_pwrdm" },
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.flags = CLKDM_CAN_HWSUP,
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.dep_bit = OMAP24XX_EN_CORE_SHIFT,
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.wkdep_srcs = core_2430_wkdeps,
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.clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
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};
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static struct clockdomain dss_2430_clkdm = {
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.name = "dss_clkdm",
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.pwrdm = { .name = "core_pwrdm" },
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.flags = CLKDM_CAN_HWSUP,
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.clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
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};
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static struct clockdomain *clockdomains_omap243x[] __initdata = {
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&wkup_common_clkdm,
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&mpu_2430_clkdm,
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&mdm_clkdm,
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&dsp_2430_clkdm,
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&gfx_2430_clkdm,
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&core_l3_2430_clkdm,
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&core_l4_2430_clkdm,
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&dss_2430_clkdm,
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NULL,
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};
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void __init omap243x_clockdomains_init(void)
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{
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if (!cpu_is_omap243x())
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return;
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clkdm_register_platform_funcs(&omap2_clkdm_operations);
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clkdm_register_clkdms(clockdomains_omap243x);
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clkdm_complete_init();
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}
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