6db4831e98
Android 14
205 lines
5.2 KiB
C
205 lines
5.2 KiB
C
#include <linux/cpu.h>
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#include <linux/dma-mapping.h>
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#include <linux/bootmem.h>
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#include <linux/gfp.h>
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#include <linux/highmem.h>
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#include <linux/export.h>
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#include <linux/memblock.h>
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#include <linux/of_address.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <linux/dma-mapping.h>
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#include <linux/vmalloc.h>
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#include <linux/swiotlb.h>
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#include <xen/xen.h>
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#include <xen/interface/grant_table.h>
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#include <xen/interface/memory.h>
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#include <xen/page.h>
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#include <xen/swiotlb-xen.h>
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#include <asm/cacheflush.h>
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#include <asm/xen/hypercall.h>
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#include <asm/xen/interface.h>
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unsigned long xen_get_swiotlb_free_pages(unsigned int order)
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{
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struct memblock_region *reg;
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gfp_t flags = __GFP_NOWARN|__GFP_KSWAPD_RECLAIM;
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for_each_memblock(memory, reg) {
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if (reg->base < (phys_addr_t)0xffffffff) {
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flags |= __GFP_DMA;
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break;
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}
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}
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return __get_free_pages(flags, order);
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}
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enum dma_cache_op {
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DMA_UNMAP,
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DMA_MAP,
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};
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static bool hypercall_cflush = false;
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/* functions called by SWIOTLB */
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static void dma_cache_maint(dma_addr_t handle, unsigned long offset,
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size_t size, enum dma_data_direction dir, enum dma_cache_op op)
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{
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struct gnttab_cache_flush cflush;
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unsigned long xen_pfn;
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size_t left = size;
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xen_pfn = (handle >> XEN_PAGE_SHIFT) + offset / XEN_PAGE_SIZE;
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offset %= XEN_PAGE_SIZE;
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do {
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size_t len = left;
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/* buffers in highmem or foreign pages cannot cross page
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* boundaries */
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if (len + offset > XEN_PAGE_SIZE)
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len = XEN_PAGE_SIZE - offset;
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cflush.op = 0;
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cflush.a.dev_bus_addr = xen_pfn << XEN_PAGE_SHIFT;
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cflush.offset = offset;
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cflush.length = len;
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if (op == DMA_UNMAP && dir != DMA_TO_DEVICE)
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cflush.op = GNTTAB_CACHE_INVAL;
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if (op == DMA_MAP) {
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if (dir == DMA_FROM_DEVICE)
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cflush.op = GNTTAB_CACHE_INVAL;
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else
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cflush.op = GNTTAB_CACHE_CLEAN;
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}
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if (cflush.op)
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HYPERVISOR_grant_table_op(GNTTABOP_cache_flush, &cflush, 1);
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offset = 0;
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xen_pfn++;
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left -= len;
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} while (left);
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}
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static void __xen_dma_page_dev_to_cpu(struct device *hwdev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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dma_cache_maint(handle & PAGE_MASK, handle & ~PAGE_MASK, size, dir, DMA_UNMAP);
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}
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static void __xen_dma_page_cpu_to_dev(struct device *hwdev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir)
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{
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dma_cache_maint(handle & PAGE_MASK, handle & ~PAGE_MASK, size, dir, DMA_MAP);
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}
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void __xen_dma_map_page(struct device *hwdev, struct page *page,
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dma_addr_t dev_addr, unsigned long offset, size_t size,
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enum dma_data_direction dir, unsigned long attrs)
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{
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if (is_device_dma_coherent(hwdev))
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return;
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if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
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return;
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__xen_dma_page_cpu_to_dev(hwdev, dev_addr, size, dir);
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}
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void __xen_dma_unmap_page(struct device *hwdev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs)
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{
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if (is_device_dma_coherent(hwdev))
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return;
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if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
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return;
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__xen_dma_page_dev_to_cpu(hwdev, handle, size, dir);
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}
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void __xen_dma_sync_single_for_cpu(struct device *hwdev,
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dma_addr_t handle, size_t size, enum dma_data_direction dir)
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{
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if (is_device_dma_coherent(hwdev))
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return;
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__xen_dma_page_dev_to_cpu(hwdev, handle, size, dir);
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}
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void __xen_dma_sync_single_for_device(struct device *hwdev,
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dma_addr_t handle, size_t size, enum dma_data_direction dir)
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{
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if (is_device_dma_coherent(hwdev))
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return;
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__xen_dma_page_cpu_to_dev(hwdev, handle, size, dir);
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}
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bool xen_arch_need_swiotlb(struct device *dev,
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phys_addr_t phys,
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dma_addr_t dev_addr)
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{
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unsigned int xen_pfn = XEN_PFN_DOWN(phys);
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unsigned int bfn = XEN_PFN_DOWN(dev_addr);
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/*
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* The swiotlb buffer should be used if
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* - Xen doesn't have the cache flush hypercall
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* - The Linux page refers to foreign memory
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* - The device doesn't support coherent DMA request
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*
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* The Linux page may be spanned acrros multiple Xen page, although
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* it's not possible to have a mix of local and foreign Xen page.
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* Furthermore, range_straddles_page_boundary is already checking
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* if buffer is physically contiguous in the host RAM.
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*
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* Therefore we only need to check the first Xen page to know if we
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* require a bounce buffer because the device doesn't support coherent
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* memory and we are not able to flush the cache.
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*/
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return (!hypercall_cflush && (xen_pfn != bfn) &&
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!is_device_dma_coherent(dev));
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}
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int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
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unsigned int address_bits,
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dma_addr_t *dma_handle)
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{
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if (!xen_initial_domain())
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return -EINVAL;
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/* we assume that dom0 is mapped 1:1 for now */
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*dma_handle = pstart;
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return 0;
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}
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EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
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void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
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{
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return;
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}
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EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
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const struct dma_map_ops *xen_dma_ops;
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EXPORT_SYMBOL(xen_dma_ops);
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int __init xen_mm_init(void)
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{
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struct gnttab_cache_flush cflush;
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if (!xen_initial_domain())
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return 0;
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xen_swiotlb_init(1, false);
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xen_dma_ops = &xen_swiotlb_dma_ops;
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cflush.op = 0;
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cflush.a.dev_bus_addr = 0;
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cflush.offset = 0;
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cflush.length = 0;
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if (HYPERVISOR_grant_table_op(GNTTABOP_cache_flush, &cflush, 1) != -ENOSYS)
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hypercall_cflush = true;
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return 0;
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}
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arch_initcall(xen_mm_init);
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