210 lines
4.9 KiB
C
210 lines
4.9 KiB
C
/*
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* arch/arm64/kernel/probes/simulate-insn.c
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*
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* Copyright (C) 2013 Linaro Limited.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <linux/bitops.h>
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#include <linux/kernel.h>
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#include <linux/kprobes.h>
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#include <asm/ptrace.h>
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#include "simulate-insn.h"
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#define bbl_displacement(insn) \
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sign_extend32(((insn) & 0x3ffffff) << 2, 27)
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#define bcond_displacement(insn) \
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sign_extend32(((insn >> 5) & 0x7ffff) << 2, 20)
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#define cbz_displacement(insn) \
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sign_extend32(((insn >> 5) & 0x7ffff) << 2, 20)
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#define tbz_displacement(insn) \
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sign_extend32(((insn >> 5) & 0x3fff) << 2, 15)
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#define ldr_displacement(insn) \
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sign_extend32(((insn >> 5) & 0x7ffff) << 2, 20)
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static inline void set_x_reg(struct pt_regs *regs, int reg, u64 val)
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{
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pt_regs_write_reg(regs, reg, val);
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}
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static inline void set_w_reg(struct pt_regs *regs, int reg, u64 val)
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{
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pt_regs_write_reg(regs, reg, lower_32_bits(val));
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}
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static inline u64 get_x_reg(struct pt_regs *regs, int reg)
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{
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return pt_regs_read_reg(regs, reg);
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}
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static inline u32 get_w_reg(struct pt_regs *regs, int reg)
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{
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return lower_32_bits(pt_regs_read_reg(regs, reg));
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}
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static bool __kprobes check_cbz(u32 opcode, struct pt_regs *regs)
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{
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int xn = opcode & 0x1f;
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return (opcode & (1 << 31)) ?
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(get_x_reg(regs, xn) == 0) : (get_w_reg(regs, xn) == 0);
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}
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static bool __kprobes check_cbnz(u32 opcode, struct pt_regs *regs)
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{
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int xn = opcode & 0x1f;
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return (opcode & (1 << 31)) ?
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(get_x_reg(regs, xn) != 0) : (get_w_reg(regs, xn) != 0);
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}
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static bool __kprobes check_tbz(u32 opcode, struct pt_regs *regs)
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{
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int xn = opcode & 0x1f;
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int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);
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return ((get_x_reg(regs, xn) >> bit_pos) & 0x1) == 0;
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}
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static bool __kprobes check_tbnz(u32 opcode, struct pt_regs *regs)
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{
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int xn = opcode & 0x1f;
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int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);
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return ((get_x_reg(regs, xn) >> bit_pos) & 0x1) != 0;
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}
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/*
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* instruction simulation functions
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*/
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void __kprobes
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simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs)
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{
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long imm, xn, val;
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xn = opcode & 0x1f;
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imm = ((opcode >> 3) & 0x1ffffc) | ((opcode >> 29) & 0x3);
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imm = sign_extend64(imm, 20);
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if (opcode & 0x80000000)
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val = (imm<<12) + (addr & 0xfffffffffffff000);
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else
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val = imm + addr;
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set_x_reg(regs, xn, val);
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instruction_pointer_set(regs, instruction_pointer(regs) + 4);
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}
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void __kprobes
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simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs)
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{
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int disp = bbl_displacement(opcode);
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/* Link register is x30 */
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if (opcode & (1 << 31))
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set_x_reg(regs, 30, addr + 4);
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instruction_pointer_set(regs, addr + disp);
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}
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void __kprobes
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simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs)
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{
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int disp = 4;
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if (aarch32_opcode_cond_checks[opcode & 0xf](regs->pstate & 0xffffffff))
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disp = bcond_displacement(opcode);
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instruction_pointer_set(regs, addr + disp);
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}
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void __kprobes
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simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs)
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{
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int xn = (opcode >> 5) & 0x1f;
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/* update pc first in case we're doing a "blr lr" */
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instruction_pointer_set(regs, get_x_reg(regs, xn));
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/* Link register is x30 */
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if (((opcode >> 21) & 0x3) == 1)
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set_x_reg(regs, 30, addr + 4);
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}
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void __kprobes
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simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs)
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{
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int disp = 4;
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if (opcode & (1 << 24)) {
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if (check_cbnz(opcode, regs))
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disp = cbz_displacement(opcode);
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} else {
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if (check_cbz(opcode, regs))
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disp = cbz_displacement(opcode);
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}
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instruction_pointer_set(regs, addr + disp);
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}
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void __kprobes
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simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs)
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{
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int disp = 4;
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if (opcode & (1 << 24)) {
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if (check_tbnz(opcode, regs))
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disp = tbz_displacement(opcode);
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} else {
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if (check_tbz(opcode, regs))
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disp = tbz_displacement(opcode);
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}
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instruction_pointer_set(regs, addr + disp);
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}
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void __kprobes
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simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs)
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{
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u64 *load_addr;
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int xn = opcode & 0x1f;
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int disp;
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disp = ldr_displacement(opcode);
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load_addr = (u64 *) (addr + disp);
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if (opcode & (1 << 30)) /* x0-x30 */
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set_x_reg(regs, xn, *load_addr);
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else /* w0-w30 */
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set_w_reg(regs, xn, *load_addr);
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instruction_pointer_set(regs, instruction_pointer(regs) + 4);
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}
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void __kprobes
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simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs)
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{
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s32 *load_addr;
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int xn = opcode & 0x1f;
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int disp;
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disp = ldr_displacement(opcode);
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load_addr = (s32 *) (addr + disp);
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set_x_reg(regs, xn, *load_addr);
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instruction_pointer_set(regs, instruction_pointer(regs) + 4);
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}
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