6db4831e98
Android 14
225 lines
5.9 KiB
C
225 lines
5.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/notifier.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <mt-plat/aee.h>
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#include <mt-plat/mtk_ccci_common.h>
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#include <dt-bindings/mfd/mt6362.h>
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#include "mt6362_buck_manager.h"
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/* Register Table */
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#define MT6362_REG_SPMI_CFG (0x210)
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#define MT6362_REG_BUCK_TOP_VOSEL1 (0x70C)
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#define MT6362_REG_BUCK_TOP_VOSEL2 (0x70D)
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#define MT6362_REG_BUCK_TOP_VOSEL4 (0x70F)
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/* Mask */
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#define MT6362_MASK_BUCK1_SPMI_CFG BIT(1)
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#define MT6362_MASK_BUCK2_SPMI_CFG BIT(2)
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#define MT6362_MASK_BUCK4_SPMI_CFG BIT(4)
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#define MT6362_MASK_MD_SPMI_CFG \
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((MT6362_MASK_BUCK1_SPMI_CFG) | (MT6362_MASK_BUCK2_SPMI_CFG) | \
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(MT6362_MASK_BUCK4_SPMI_CFG))
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#define MT6362_BUCK_UV_STEP (6250)
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enum {
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SUBPMIC_BUCK_MD_VRF09,
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SUBPMIC_BUCK_MD_VRF13,
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SUBPMIC_BUCK_MD_MAX,
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};
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static const char *md_buck_name[SUBPMIC_BUCK_MD_MAX] = {
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"MD_VRF09", "MD_VRF13",
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};
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struct md_oc_info {
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const char *name;
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struct notifier_block oc_nb;
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};
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struct mt6362_buck_manager_data {
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struct device *dev;
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struct regmap *regmap;
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struct md_oc_info md_oc_infos[SUBPMIC_BUCK_MD_MAX];
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u32 vmodem;
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u32 vsram_md;
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bool md_init;
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};
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/* for MD ccci api */
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static struct mt6362_buck_manager_data *g_data;
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static int md_buck_oc_notify(struct notifier_block *nb, unsigned long event,
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void *data)
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{
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#ifdef CONFIG_MTK_CCCI_DEVICES
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struct md_oc_info *oc_info;
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char oc_str[30] = "";
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int data_int32 = 0;
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int ret;
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oc_info = container_of(nb, struct md_oc_info, oc_nb);
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if (event != REGULATOR_EVENT_OVER_CURRENT)
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return NOTIFY_OK;
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ret = snprintf(oc_str, 30, "PMIC OC:%s", oc_info->name);
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if (ret < 0)
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return NOTIFY_OK;
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aee_kernel_warning(oc_str, "\nCRDISPATCH_KEY:MD OC\nOC Interrupt: %s",
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oc_info->name);
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/* notify MD by ccci */
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if (!strcmp(oc_info->name, "MD_VRF09"))
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data_int32 = 1 << 2;
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else if (!strcmp(oc_info->name, "MD_VRF13"))
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data_int32 = 1 << 3;
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else
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return NOTIFY_OK;
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ret = exec_ccci_kern_func_by_md_id(MD_SYS1, ID_PMIC_INTR,
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(char *)&data_int32, 4);
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if (ret)
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pr_notice("[%s]-exec_ccci fail(%d)\n", __func__, ret);
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#endif
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return NOTIFY_OK;
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}
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/* [Export MD CCCI API] */
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void mt6362_vmd1_pmic_setting_on(void)
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{
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struct mt6362_buck_manager_data *data = g_data;
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int ret;
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pr_info("%s\n", __func__);
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if (!data) {
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pr_notice("%s: data uninitialize, adjust probe order\n",
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__func__);
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return;
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}
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/* first time read VMODEM(VNR 2-phase)/VSRAM_MD voltage */
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if (!data->md_init) {
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ret = regmap_read(data->regmap,
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MT6362_REG_BUCK_TOP_VOSEL1, &data->vmodem);
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ret |= regmap_read(data->regmap,
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MT6362_REG_BUCK_TOP_VOSEL4, &data->vsram_md);
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if (ret < 0) {
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dev_err(data->dev,
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"%s: read MD buck voltage fail\n", __func__);
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return;
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}
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dev_info(data->dev, "%s: [vosel]vmodem=%d, vsram_md=%d\n",
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__func__, data->vmodem, data->vsram_md);
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data->md_init = true;
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return;
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}
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/* secondary reset MD power */
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/* set buck 1/2/4 spmi control by SPMI_M */
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ret = regmap_update_bits(data->regmap, MT6362_REG_SPMI_CFG,
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MT6362_MASK_MD_SPMI_CFG, 0);
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if (ret < 0) {
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dev_err(data->dev, "%s: set spmi_m ctrl fail\n", __func__);
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return;
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}
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/* Reset VMODEM(VNR 2-phase)/VSRAM_MD default voltage */
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ret = regmap_write(data->regmap,
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MT6362_REG_BUCK_TOP_VOSEL4, data->vsram_md);
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if (ret < 0)
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dev_err(data->dev, "%s: set VSRAM_MD power fail\n", __func__);
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ret = regmap_write(data->regmap,
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MT6362_REG_BUCK_TOP_VOSEL1, data->vmodem);
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if (ret < 0)
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dev_err(data->dev, "%s: set VMODEM power fail\n", __func__);
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/* recover buck 1/2/4 spmi control by SPMI_P */
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ret = regmap_update_bits(data->regmap, MT6362_REG_SPMI_CFG,
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MT6362_MASK_MD_SPMI_CFG, 0xff);
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if (ret < 0)
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dev_err(data->dev, "%s: recover spmi_p ctrl fail\n", __func__);
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pr_info("%s: reset vosel done\n", __func__);
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}
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static int mt6362_buck_manager_probe(struct platform_device *pdev)
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{
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struct mt6362_buck_manager_data *data;
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struct md_oc_info *oc_info;
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struct regulator *reg;
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int i, ret = 0;
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dev_info(&pdev->dev, "%s\n", __func__);
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if (!of_device_is_available(pdev->dev.of_node)) {
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dev_info(&pdev->dev,
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"this project no need to enable OC debug\n");
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return 0;
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}
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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data->regmap = dev_get_regmap(pdev->dev.parent, NULL);
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if (!data->regmap) {
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dev_err(&pdev->dev, "failed to allocate regmap\n");
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return -ENODEV;
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}
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data->dev = &pdev->dev;
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data->vmodem = 0;
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data->vsram_md = 0;
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data->md_init = false;
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platform_set_drvdata(pdev, data);
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g_data = data;
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for (i = 0; i < SUBPMIC_BUCK_MD_MAX; i++) {
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oc_info = &data->md_oc_infos[i];
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oc_info->name = md_buck_name[i];
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reg = devm_regulator_get_optional(&pdev->dev,
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oc_info->name);
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if (PTR_ERR(reg) == -EPROBE_DEFER)
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return PTR_ERR(reg);
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else if (IS_ERR(reg)) {
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dev_notice(&pdev->dev, "fail to get regulator %s\n",
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oc_info->name);
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continue;
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}
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oc_info->oc_nb.notifier_call = md_buck_oc_notify;
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ret = devm_regulator_register_notifier(reg,
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&oc_info->oc_nb);
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if (ret) {
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dev_notice(&pdev->dev,
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"register regulator notifier failed\n");
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}
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}
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dev_info(&pdev->dev, "%s: successfully\n", __func__);
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return ret;
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}
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static const struct of_device_id mt6362_buck_manager_of_match[] = {
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{ .compatible = "mediatek,mt6362-buck-manager", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, mt6362_buck_manager_of_match);
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static struct platform_driver mt6362_buck_manager_driver = {
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.driver = {
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.name = "mt6362-buck-manager",
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.of_match_table = of_match_ptr(mt6362_buck_manager_of_match),
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},
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.probe = mt6362_buck_manager_probe,
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};
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module_platform_driver(mt6362_buck_manager_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Gene Chen <vend_gene_chen001@mediatek.com>");
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MODULE_DESCRIPTION("MediaTek MT6362 Buck Manager Driver");
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