6db4831e98
Android 14
217 lines
6.2 KiB
C
217 lines
6.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2020 MediaTek Inc.
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* Author: cy_huang <cy_huang@richtek.com>
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*/
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#ifndef LINUX_MISC_RT_REGMAP_H
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#define LINUX_MISC_RT_REGMAP_H
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#include <linux/i2c.h>
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enum rt_access_mode {
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RT_1BYTE_MODE = 1,
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RT_2BYTE_MODE = 2,
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RT_4BYTE_MODE = 4,
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RT_DUMMY_MODE = -1,
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};
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/* start: the start address of group
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* end: the end address of group
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* mode: access mode (1,2,4 bytes)
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*/
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struct rt_access_group {
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u32 start;
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u32 end;
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enum rt_access_mode mode;
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};
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/* rt_reg_type
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* RT_NORMAL : Write without mask, Read from cache
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* RT_WBITS : Write with mask, Read from cache
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* RT_VOLATILE : Write to chip directly, Read from chip
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* RT_RESERVE : Reserve registers (Write/Read as RT_NORMAL)
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*/
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#define RT_REG_TYPE_MASK (0x03)
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#define RT_NORMAL (0x00)
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#define RT_WBITS (0x01)
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#define RT_VOLATILE (0x02)
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#define RT_RESERVE (0x03)
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/* RT_WR_ONCE: if write data = cache data, data will not be written.
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*/
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#define RT_WR_ONCE (0x08)
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#define RT_NORMAL_WR_ONCE (RT_NORMAL | RT_WR_ONCE)
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#define RT_WBITS_WR_ONCE (RT_WBITS | RT_WR_ONCE)
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enum rt_data_format {
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RT_LITTLE_ENDIAN,
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RT_BIG_ENDIAN,
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};
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/* rt_regmap_mode
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* 0 0 0 0 0 0 0 0
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* | | | | | |
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* | | | |__| byte_mode
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* | |__| ||
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* | || Cache_mode
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* | Block_mode
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* Debug_mode
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*/
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#define RT_BYTE_MODE_MASK (0x01)
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/* 1 byte for each register */
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#define RT_SINGLE_BYTE (0 << 0)
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/* multi bytes for each regiseter */
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#define RT_MULTI_BYTE (1 << 0)
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#define RT_CACHE_MODE_MASK (0x06)
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/* write to cache and chip synchronously */
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#define RT_CACHE_WR_THROUGH (0 << 1)
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/* write to cache and chip asynchronously */
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#define RT_CACHE_WR_BACK (1 << 1)
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/* disable cache */
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#define RT_CACHE_DISABLE (2 << 1)
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#define RT_IO_BLK_MODE_MASK (0x18)
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/* pass through all write function */
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#define RT_IO_PASS_THROUGH (0 << 3)
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/* block all write function */
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#define RT_IO_BLK_ALL (1 << 3)
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/* block cache write function */
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#define RT_IO_BLK_CACHE (2 << 3)
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/* block chip write function */
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#define RT_IO_BLK_CHIP (3 << 3)
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#define RT_DBG_MODE_MASK (0x20)
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/* create general debugfs for register map */
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#define RT_DBG_GENERAL (0 << 5)
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/* create node for each regisetr map by register address */
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#define RT_DBG_SPECIAL (1 << 5)
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/* struct rt_register
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*
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* Ricktek register map structure for storing mapping data
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* @addr: register address.
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* @size: register size in byte.
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* @reg_type: register R/W type (RT_NORMAL, RT_WBITS, RT_VOLATILE, RT_RESERVE).
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* @wbit_mask: register writeable bits mask.
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*/
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struct rt_register {
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u32 addr;
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unsigned int size;
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unsigned char reg_type;
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unsigned char *wbit_mask;
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};
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/* Declare a rt_register by RT_REG_DECL
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*/
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#define RT_REG_DECL(_addr, _reg_length, _reg_type, _mask_...) \
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static unsigned char rt_writable_mask_##_addr[_reg_length] = _mask_; \
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static struct rt_register rt_register_##_addr = { \
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.addr = _addr, \
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.size = _reg_length, \
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.reg_type = _reg_type, \
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.wbit_mask = rt_writable_mask_##_addr, \
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}
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#define rt_register_map_t struct rt_register *
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#define RT_REG(_addr) (&rt_register_##_addr)
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/* rt_regmap_properties
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* @name: the name of debug node.
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* @aliases: alisis name of rt_regmap_device.
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* @rm: rt_regiseter_map pointer array.
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* @register_num: the number of rt_register_map registers.
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* @group: register map access group.
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* @rt_format: default is little endian.
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* @rt_regmap_mode: rt_regmap_device mode.
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* @io_log_en: enable/disable io log
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*/
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struct rt_regmap_properties {
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const char *name;
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const char *aliases;
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const rt_register_map_t *rm;
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int register_num;
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struct rt_access_group *group;
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const enum rt_data_format rt_format;
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unsigned char rt_regmap_mode;
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unsigned char io_log_en:1;
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};
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/* A passing struct for rt_regmap_reg_read and rt_regmap_reg_write function
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* reg: regmap addr.
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* mask: mask for update bits.
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* rt_data: register value.
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*/
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struct rt_reg_data {
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u32 reg;
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u32 mask;
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union {
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u32 data_u32;
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u16 data_u16;
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u8 data_u8;
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u8 data[4];
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} rt_data;
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};
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struct rt_regmap_device;
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/* basic chip read/write function */
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struct rt_regmap_fops {
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int (*read_device)(void *client, u32 addr, int len, void *dst);
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int (*write_device)(void *client, u32 addr, int len, const void *src);
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};
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/* with device address */
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extern struct rt_regmap_device*
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rt_regmap_device_register_ex(struct rt_regmap_properties *props,
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struct rt_regmap_fops *rops,
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struct device *parent,
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void *client, int dev_addr, void *drvdata);
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static inline struct rt_regmap_device*
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rt_regmap_device_register(struct rt_regmap_properties *props,
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struct rt_regmap_fops *rops,
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struct device *parent,
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struct i2c_client *client, void *drvdata)
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{
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return rt_regmap_device_register_ex(props, rops, parent,
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client, client->addr, drvdata);
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}
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extern void rt_regmap_device_unregister(struct rt_regmap_device *rd);
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extern int rt_regmap_cache_reload(struct rt_regmap_device *rd);
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extern int rt_regmap_block_write(struct rt_regmap_device *rd, u32 reg,
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int bytes, const void *src);
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extern int rt_asyn_regmap_block_write(struct rt_regmap_device *rd, u32 reg,
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int bytes, const void *src);
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extern int rt_regmap_block_read(struct rt_regmap_device *rd, u32 reg,
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int bytes, void *dst);
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extern int rt_regmap_reg_read(struct rt_regmap_device *rd,
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struct rt_reg_data *rrd, u32 reg);
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extern int rt_regmap_reg_write(struct rt_regmap_device *rd,
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struct rt_reg_data *rrd, u32 reg,
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const u32 data);
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extern int rt_asyn_regmap_reg_write(struct rt_regmap_device *rd,
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struct rt_reg_data *rrd, u32 reg,
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const u32 data);
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extern int rt_regmap_update_bits(struct rt_regmap_device *rd,
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struct rt_reg_data *rrd, u32 reg,
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u32 mask, u32 data);
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extern void rt_regmap_cache_sync(struct rt_regmap_device *rd);
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extern void rt_regmap_cache_write_back(struct rt_regmap_device *rd, u32 reg);
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extern int rt_is_reg_volatile(struct rt_regmap_device *rd, u32 reg);
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extern int rt_get_regsize(struct rt_regmap_device *rd, u32 reg);
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extern void rt_cache_getlasterror(struct rt_regmap_device *rd, char *buf,
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size_t size);
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extern void rt_cache_clrlasterror(struct rt_regmap_device *rd);
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extern int rt_regmap_add_debugfs(struct rt_regmap_device *rd, const char *name,
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umode_t mode, void *data,
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const struct file_operations *fops);
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#endif /* LINUX_MISC_RT_REGMAP_H */
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