6db4831e98
Android 14
67 lines
2.3 KiB
C
67 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/***************************************************************************
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* WT register offsets.
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*
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* Wed Oct 22 13:50:20 2003
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* Copyright 2003 mjander
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* mjander@users.sourceforge.org
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****************************************************************************/
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#ifndef _AU88X0_WT_H
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#define _AU88X0_WT_H
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/* WT channels are grouped in banks. Each bank has 0x20 channels. */
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/* Bank register address boundary is 0x8000 */
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#define NR_WT_PB 0x20
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/* WT bank base register (as dword address). */
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#define WT_BAR(x) (((x)&0xffe0)<<0x8)
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#define WT_BANK(x) (x>>5)
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/* WT Bank registers */
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#define WT_CTRL(bank) (((((bank)&1)<<0xd) + 0x00)<<2) /* 0x0000 */
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#define WT_SRAMP(bank) (((((bank)&1)<<0xd) + 0x01)<<2) /* 0x0004 */
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#define WT_DSREG(bank) (((((bank)&1)<<0xd) + 0x02)<<2) /* 0x0008 */
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#define WT_MRAMP(bank) (((((bank)&1)<<0xd) + 0x03)<<2) /* 0x000c */
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#define WT_GMODE(bank) (((((bank)&1)<<0xd) + 0x04)<<2) /* 0x0010 */
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#define WT_ARAMP(bank) (((((bank)&1)<<0xd) + 0x05)<<2) /* 0x0014 */
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/* WT Voice registers */
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#define WT_STEREO(voice) ((WT_BAR(voice)+ 0x20 +(((voice)&0x1f)>>1))<<2) /* 0x0080 */
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#define WT_MUTE(voice) ((WT_BAR(voice)+ 0x40 +((voice)&0x1f))<<2) /* 0x0100 */
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#define WT_RUN(voice) ((WT_BAR(voice)+ 0x60 +((voice)&0x1f))<<2) /* 0x0180 */
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/* Some kind of parameters. */
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/* PARM0, PARM1 : Filter (0xFF000000), SampleRate (0x0000FFFF) */
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/* PARM2, PARM3 : Still unknown */
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#define WT_PARM(x,y) (((WT_BAR(x))+ 0x80 +(((x)&0x1f)<<2)+(y))<<2) /* 0x0200 */
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#define WT_DELAY(x,y) (((WT_BAR(x))+ 0x100 +(((x)&0x1f)<<2)+(y))<<2) /* 0x0400 */
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/* Numeric indexes used by SetReg() and GetReg() */
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#if 0
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enum {
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run = 0, /* 0 W 1:run 0:stop */
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parm0, /* 1 W filter, samplerate */
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parm1, /* 2 W filter, samplerate */
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parm2, /* 3 W */
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parm3, /* 4 RW volume. This value is calculated using floating point ops. */
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sramp, /* 5 W */
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mute, /* 6 W 1:mute, 0:unmute */
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gmode, /* 7 RO Looks like only bit0 is used. */
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aramp, /* 8 W */
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mramp, /* 9 W */
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ctrl, /* a W */
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delay, /* b W All 4 values are written at once with same value. */
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dsreg, /* c (R)W */
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} wt_reg;
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#endif
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typedef struct {
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u32 parm0; /* this_1E4 */
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u32 parm1; /* this_1E8 */
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u32 parm2; /* this_1EC */
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u32 parm3; /* this_1F0 */
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u32 this_1D0;
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} wt_voice_t;
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#endif /* _AU88X0_WT_H */
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/* End of file */
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