26 lines
657 B
Plaintext
26 lines
657 B
Plaintext
Mediatek ethsys controller
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The Mediatek ethsys controller provides various clocks to the system.
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Required Properties:
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- compatible: Should be:
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- "mediatek,mt2701-ethsys", "syscon"
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- "mediatek,mt7622-ethsys", "syscon"
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- #clock-cells: Must be 1
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- #reset-cells: Must be 1
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The ethsys controller uses the common clk binding from
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Documentation/devicetree/bindings/clock/clock-bindings.txt
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The available clocks are defined in dt-bindings/clock/mt*-clk.h.
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Example:
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ethsys: clock-controller@1b000000 {
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compatible = "mediatek,mt2701-ethsys", "syscon";
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reg = <0 0x1b000000 0 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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