84 lines
1.7 KiB
Plaintext
84 lines
1.7 KiB
Plaintext
ST-Ericsson Ux500 boards
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Required properties (in root node) one of these:
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compatible = "st-ericsson,mop500" (legacy)
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compatible = "st-ericsson,u8500"
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Required node (under root node):
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soc: represents the system-on-chip and contains the chip
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peripherals
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Required property of soc node, one of these:
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compatible = "stericsson,db8500"
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Required subnodes under soc node:
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backupram: (used for CPU spin tables and for storing data
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during retention, system won't boot without this):
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compatible = "ste,dbx500-backupram"
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scu:
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see binding for arm/scu.txt
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interrupt-controller:
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see binding for interrupt-controller/arm,gic.txt
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timer:
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see binding for timer/arm,twd.txt
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clocks:
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see binding for clocks/ux500.txt
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Example:
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/dts-v1/;
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/ {
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model = "ST-Ericsson HREF (pre-v60) and ST UIB";
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compatible = "st-ericsson,mop500", "st-ericsson,u8500";
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "stericsson,db8500";
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interrupt-parent = <&intc>;
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ranges;
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backupram@80150000 {
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compatible = "ste,dbx500-backupram";
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reg = <0x80150000 0x2000>;
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};
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intc: interrupt-controller@a0411000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <1>;
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interrupt-controller;
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reg = <0xa0411000 0x1000>,
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<0xa0410100 0x100>;
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};
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scu@a04100000 {
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compatible = "arm,cortex-a9-scu";
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reg = <0xa0410000 0x100>;
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};
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timer@a0410600 {
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0xa0410600 0x20>;
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interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
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clocks = <&smp_twd_clk>;
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};
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clocks {
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compatible = "stericsson,u8500-clks";
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smp_twd_clk: smp-twd-clock {
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#clock-cells = <0>;
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};
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};
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};
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};
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