81 lines
2.4 KiB
Plaintext
81 lines
2.4 KiB
Plaintext
Generic on-chip SRAM
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Simple IO memory regions to be managed by the genalloc API.
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Required properties:
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- compatible : mmio-sram or atmel,sama5d2-securam
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- reg : SRAM iomem address range
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Reserving sram areas:
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---------------------
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Each child of the sram node specifies a region of reserved memory. Each
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child node should use a 'reg' property to specify a specific range of
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reserved memory.
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Following the generic-names recommended practice, node names should
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reflect the purpose of the node. Unit address (@<address>) should be
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appended to the name.
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Required properties in the sram node:
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- #address-cells, #size-cells : should use the same values as the root node
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- ranges : standard definition, should translate from local addresses
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within the sram to bus addresses
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Optional properties in the sram node:
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- no-memory-wc : the flag indicating, that SRAM memory region has not to
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be remapped as write combining. WC is used by default.
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Required properties in the area nodes:
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- reg : iomem address range, relative to the SRAM range
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Optional properties in the area nodes:
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- compatible : standard definition, should contain a vendor specific string
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in the form <vendor>,[<device>-]<usage>
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- pool : indicates that the particular reserved SRAM area is addressable
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and in use by another device or devices
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- export : indicates that the reserved SRAM area may be accessed outside
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of the kernel, e.g. by bootloader or userspace
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- protect-exec : Same as 'pool' above but with the additional
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constraint that code wil be run from the region and
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that the memory is maintained as read-only, executable
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during code execution. NOTE: This region must be page
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aligned on start and end in order to properly allow
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manipulation of the page attributes.
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- label : the name for the reserved partition, if omitted, the label
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is taken from the node name excluding the unit address.
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- clocks : a list of phandle and clock specifier pair that controls the
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single SRAM clock.
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Example:
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sram: sram@5c000000 {
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compatible = "mmio-sram";
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reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x5c000000 0x40000>;
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smp-sram@100 {
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compatible = "socvendor,smp-sram";
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reg = <0x100 0x50>;
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};
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device-sram@1000 {
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reg = <0x1000 0x1000>;
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pool;
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};
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exported@20000 {
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reg = <0x20000 0x20000>;
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export;
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};
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};
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