63 lines
1.1 KiB
Plaintext
63 lines
1.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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#include "jz4770.dtsi"
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/ {
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compatible = "gcw,zero", "ingenic,jz4770";
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model = "GCW Zero";
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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};
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chosen {
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stdout-path = "serial2:57600n8";
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};
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board {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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otg_phy: otg-phy {
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compatible = "usb-nop-xceiv";
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clocks = <&cgu JZ4770_CLK_OTG_PHY>;
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clock-names = "main_clk";
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};
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};
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};
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&ext {
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clock-frequency = <12000000>;
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};
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&uart2 {
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status = "okay";
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};
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&cgu {
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/* Put high-speed peripherals under PLL1, such that we can change the
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* PLL0 frequency on demand without having to suspend peripherals.
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* We use a rate of 432 MHz, which is the least common multiple of
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* 27 MHz (required by TV encoder) and 48 MHz (required by USB host).
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*/
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assigned-clocks =
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<&cgu JZ4770_CLK_PLL1>,
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<&cgu JZ4770_CLK_UHC>;
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assigned-clock-parents =
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<0>,
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<&cgu JZ4770_CLK_PLL1>;
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assigned-clock-rates =
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<432000000>;
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};
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&uhc {
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/* The WiFi module is connected to the UHC. */
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status = "okay";
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};
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