327 lines
6 KiB
Plaintext
327 lines
6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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#include <dt-bindings/clock/jz4780-cgu.h>
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#include <dt-bindings/dma/jz4780-dma.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ingenic,jz4780";
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cpuintc: interrupt-controller {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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intc: interrupt-controller@10001000 {
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compatible = "ingenic,jz4780-intc";
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reg = <0x10001000 0x50>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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};
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ext: ext {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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};
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rtc: rtc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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cgu: jz4780-cgu@10000000 {
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compatible = "ingenic,jz4780-cgu";
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reg = <0x10000000 0x100>;
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clocks = <&ext>, <&rtc>;
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clock-names = "ext", "rtc";
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#clock-cells = <1>;
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};
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rtc_dev: rtc@10003000 {
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compatible = "ingenic,jz4780-rtc";
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reg = <0x10003000 0x4c>;
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interrupt-parent = <&intc>;
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interrupts = <32>;
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clocks = <&cgu JZ4780_CLK_RTCLK>;
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clock-names = "rtc";
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};
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pinctrl: pin-controller@10010000 {
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compatible = "ingenic,jz4780-pinctrl";
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reg = <0x10010000 0x600>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpa: gpio@0 {
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compatible = "ingenic,jz4780-gpio";
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reg = <0>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 0 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <17>;
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};
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gpb: gpio@1 {
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compatible = "ingenic,jz4780-gpio";
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reg = <1>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 32 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <16>;
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};
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gpc: gpio@2 {
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compatible = "ingenic,jz4780-gpio";
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reg = <2>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 64 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <15>;
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};
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gpd: gpio@3 {
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compatible = "ingenic,jz4780-gpio";
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reg = <3>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 96 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <14>;
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};
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gpe: gpio@4 {
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compatible = "ingenic,jz4780-gpio";
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reg = <4>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 128 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <13>;
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};
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gpf: gpio@5 {
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compatible = "ingenic,jz4780-gpio";
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reg = <5>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 160 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <12>;
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};
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};
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spi_gpio {
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compatible = "spi-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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num-chipselects = <2>;
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gpio-miso = <&gpe 14 0>;
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gpio-sck = <&gpe 15 0>;
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gpio-mosi = <&gpe 17 0>;
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cs-gpios = <&gpe 16 0
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&gpe 18 0>;
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spidev@0 {
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compatible = "spidev";
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reg = <0>;
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spi-max-frequency = <1000000>;
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};
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};
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uart0: serial@10030000 {
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compatible = "ingenic,jz4780-uart";
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reg = <0x10030000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <51>;
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clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
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clock-names = "baud", "module";
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status = "disabled";
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};
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uart1: serial@10031000 {
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compatible = "ingenic,jz4780-uart";
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reg = <0x10031000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <50>;
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clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
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clock-names = "baud", "module";
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status = "disabled";
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};
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uart2: serial@10032000 {
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compatible = "ingenic,jz4780-uart";
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reg = <0x10032000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <49>;
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clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
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clock-names = "baud", "module";
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status = "disabled";
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};
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uart3: serial@10033000 {
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compatible = "ingenic,jz4780-uart";
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reg = <0x10033000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <48>;
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clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
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clock-names = "baud", "module";
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status = "disabled";
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};
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uart4: serial@10034000 {
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compatible = "ingenic,jz4780-uart";
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reg = <0x10034000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <34>;
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clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
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clock-names = "baud", "module";
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status = "disabled";
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};
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watchdog: watchdog@10002000 {
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compatible = "ingenic,jz4780-watchdog";
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reg = <0x10002000 0x10>;
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clocks = <&cgu JZ4780_CLK_RTCLK>;
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clock-names = "rtc";
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};
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nemc: nemc@13410000 {
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compatible = "ingenic,jz4780-nemc";
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reg = <0x13410000 0x10000>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <1 0 0x1b000000 0x1000000
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2 0 0x1a000000 0x1000000
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3 0 0x19000000 0x1000000
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4 0 0x18000000 0x1000000
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5 0 0x17000000 0x1000000
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6 0 0x16000000 0x1000000>;
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clocks = <&cgu JZ4780_CLK_NEMC>;
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status = "disabled";
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};
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dma: dma@13420000 {
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compatible = "ingenic,jz4780-dma";
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reg = <0x13420000 0x10000>;
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#dma-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <10>;
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clocks = <&cgu JZ4780_CLK_PDMA>;
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};
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mmc0: mmc@13450000 {
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compatible = "ingenic,jz4780-mmc";
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reg = <0x13450000 0x1000>;
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interrupt-parent = <&intc>;
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interrupts = <37>;
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clocks = <&cgu JZ4780_CLK_MSC0>;
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clock-names = "mmc";
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cap-sd-highspeed;
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cap-mmc-highspeed;
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cap-sdio-irq;
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dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
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<&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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mmc1: mmc@13460000 {
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compatible = "ingenic,jz4780-mmc";
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reg = <0x13460000 0x1000>;
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interrupt-parent = <&intc>;
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interrupts = <36>;
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clocks = <&cgu JZ4780_CLK_MSC1>;
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clock-names = "mmc";
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cap-sd-highspeed;
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cap-mmc-highspeed;
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cap-sdio-irq;
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dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
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<&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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bch: bch@134d0000 {
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compatible = "ingenic,jz4780-bch";
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reg = <0x134d0000 0x10000>;
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clocks = <&cgu JZ4780_CLK_BCH>;
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status = "disabled";
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};
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};
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