6db4831e98
Android 14
170 lines
3.9 KiB
ArmAsm
170 lines
3.9 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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.file "reg_u_add.S"
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/*---------------------------------------------------------------------------+
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| reg_u_add.S |
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| Add two valid (TAG_Valid) FPU_REG numbers, of the same sign, and put the |
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| result in a destination FPU_REG. |
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| |
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| Copyright (C) 1992,1993,1995,1997 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
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| E-mail billm@suburbia.net |
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| |
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| Call from C as: |
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| int FPU_u_add(FPU_REG *arg1, FPU_REG *arg2, FPU_REG *answ, |
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| int control_w) |
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| Return value is the tag of the answer, or-ed with FPU_Exception if |
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| one was raised, or -1 on internal error. |
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| |
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+---------------------------------------------------------------------------*/
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/*
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| Kernel addition routine FPU_u_add(reg *arg1, reg *arg2, reg *answ).
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| Takes two valid reg f.p. numbers (TAG_Valid), which are
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| treated as unsigned numbers,
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| and returns their sum as a TAG_Valid or TAG_Special f.p. number.
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| The returned number is normalized.
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| Basic checks are performed if PARANOID is defined.
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*/
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#include "exception.h"
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#include "fpu_emu.h"
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#include "control_w.h"
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.text
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ENTRY(FPU_u_add)
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pushl %ebp
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movl %esp,%ebp
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pushl %esi
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pushl %edi
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pushl %ebx
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movl PARAM1,%esi /* source 1 */
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movl PARAM2,%edi /* source 2 */
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movl PARAM6,%ecx
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movl %ecx,%edx
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subl PARAM7,%ecx /* exp1 - exp2 */
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jge L_arg1_larger
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/* num1 is smaller */
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movl SIGL(%esi),%ebx
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movl SIGH(%esi),%eax
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movl %edi,%esi
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movl PARAM7,%edx
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negw %cx
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jmp L_accum_loaded
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L_arg1_larger:
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/* num1 has larger or equal exponent */
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movl SIGL(%edi),%ebx
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movl SIGH(%edi),%eax
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L_accum_loaded:
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movl PARAM3,%edi /* destination */
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movw %dx,EXP(%edi) /* Copy exponent to destination */
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xorl %edx,%edx /* clear the extension */
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#ifdef PARANOID
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testl $0x80000000,%eax
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je L_bugged
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testl $0x80000000,SIGH(%esi)
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je L_bugged
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#endif /* PARANOID */
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/* The number to be shifted is in %eax:%ebx:%edx */
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cmpw $32,%cx /* shrd only works for 0..31 bits */
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jnc L_more_than_31
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/* less than 32 bits */
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shrd %cl,%ebx,%edx
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shrd %cl,%eax,%ebx
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shr %cl,%eax
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jmp L_shift_done
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L_more_than_31:
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cmpw $64,%cx
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jnc L_more_than_63
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subb $32,%cl
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jz L_exactly_32
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shrd %cl,%eax,%edx
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shr %cl,%eax
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orl %ebx,%ebx
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jz L_more_31_no_low /* none of the lowest bits is set */
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orl $1,%edx /* record the fact in the extension */
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L_more_31_no_low:
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movl %eax,%ebx
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xorl %eax,%eax
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jmp L_shift_done
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L_exactly_32:
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movl %ebx,%edx
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movl %eax,%ebx
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xorl %eax,%eax
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jmp L_shift_done
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L_more_than_63:
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cmpw $65,%cx
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jnc L_more_than_64
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movl %eax,%edx
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orl %ebx,%ebx
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jz L_more_63_no_low
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orl $1,%edx
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jmp L_more_63_no_low
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L_more_than_64:
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movl $1,%edx /* The shifted nr always at least one '1' */
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L_more_63_no_low:
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xorl %ebx,%ebx
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xorl %eax,%eax
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L_shift_done:
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/* Now do the addition */
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addl SIGL(%esi),%ebx
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adcl SIGH(%esi),%eax
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jnc L_round_the_result
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/* Overflow, adjust the result */
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rcrl $1,%eax
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rcrl $1,%ebx
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rcrl $1,%edx
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jnc L_no_bit_lost
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orl $1,%edx
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L_no_bit_lost:
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incw EXP(%edi)
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L_round_the_result:
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jmp fpu_reg_round /* Round the result */
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#ifdef PARANOID
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/* If we ever get here then we have problems! */
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L_bugged:
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pushl EX_INTERNAL|0x201
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call EXCEPTION
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pop %ebx
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movl $-1,%eax
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jmp L_exit
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L_exit:
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popl %ebx
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popl %edi
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popl %esi
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leave
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ret
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#endif /* PARANOID */
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ENDPROC(FPU_u_add)
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