266 lines
6.4 KiB
C
266 lines
6.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/clk-provider.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt6877-clk.h>
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#define MT_CCF_BRINGUP 1
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/* Regular Number Definition */
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#define INV_OFS -1
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#define INV_BIT -1
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/* get spm power status struct to register inside clk_data */
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static struct pwr_status cam_m_pwr_stat = GATE_PWR_STAT(0xEF0,
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0xEF4, INV_OFS, BIT(23), BIT(23));
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static const struct mtk_gate_regs cam_m_cg_regs = {
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.set_ofs = 0x4,
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.clr_ofs = 0x8,
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.sta_ofs = 0x0,
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};
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#define GATE_CAM_M(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &cam_m_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr, \
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.pwr_stat = &cam_m_pwr_stat, \
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}
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static const struct mtk_gate cam_m_clks[] = {
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GATE_CAM_M(CLK_CAM_M_LARB13, "cam_m_larb13",
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"cam_ck"/* parent */, 0),
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GATE_CAM_M(CLK_CAM_M_LARB14, "cam_m_larb14",
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"cam_ck"/* parent */, 2),
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GATE_CAM_M(CLK_CAM_M_CAM, "cam_m_cam",
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"cam_ck"/* parent */, 6),
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GATE_CAM_M(CLK_CAM_M_CAMTG, "cam_m_camtg",
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"cam_ck"/* parent */, 7),
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GATE_CAM_M(CLK_CAM_M_SENINF, "cam_m_seninf",
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"cam_ck"/* parent */, 8),
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GATE_CAM_M(CLK_CAM_M_CAMSV0, "cam_m_camsv0",
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"cam_ck"/* parent */, 9),
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GATE_CAM_M(CLK_CAM_M_CAMSV1, "cam_m_camsv1",
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"cam_ck"/* parent */, 10),
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GATE_CAM_M(CLK_CAM_M_CAMSV2, "cam_m_camsv2",
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"cam_ck"/* parent */, 11),
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GATE_CAM_M(CLK_CAM_M_CAMSV3, "cam_m_camsv3",
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"cam_ck"/* parent */, 12),
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GATE_CAM_M(CLK_CAM_M_CCU0, "cam_m_ccu0",
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"cam_ck"/* parent */, 13),
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GATE_CAM_M(CLK_CAM_M_CCU1, "cam_m_ccu1",
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"cam_ck"/* parent */, 14),
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GATE_CAM_M(CLK_CAM_M_MRAW0, "cam_m_mraw0",
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"cam_ck"/* parent */, 15),
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GATE_CAM_M(CLK_CAM_M_CCU_GALS, "cam_m_ccu_gals",
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"cam_ck"/* parent */, 18),
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GATE_CAM_M(CLK_CAM_M_CAM2MM_GALS, "cam_m_cam2mm_gals",
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"cam_ck"/* parent */, 19),
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GATE_CAM_M(CLK_CAM_M_CAMSV4, "cam_m_camsv4",
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"cam_ck"/* parent */, 20),
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GATE_CAM_M(CLK_CAM_M_PDA, "cam_m_pda",
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"cam_ck"/* parent */, 21),
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};
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/* get spm power status struct to register inside clk_data */
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static struct pwr_status cam_ra_pwr_stat = GATE_PWR_STAT(0xEF0,
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0xEF4, INV_OFS, BIT(24), BIT(24));
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static const struct mtk_gate_regs cam_ra_cg_regs = {
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.set_ofs = 0x4,
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.clr_ofs = 0x8,
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.sta_ofs = 0x0,
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};
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#define GATE_CAM_RA(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &cam_ra_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr, \
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.pwr_stat = &cam_ra_pwr_stat, \
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}
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static const struct mtk_gate cam_ra_clks[] = {
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GATE_CAM_RA(CLK_CAM_RA_LARBX, "cam_ra_larbx",
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"cam_ck"/* parent */, 0),
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GATE_CAM_RA(CLK_CAM_RA_CAM, "cam_ra_cam",
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"cam_ck"/* parent */, 1),
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GATE_CAM_RA(CLK_CAM_RA_CAMTG, "cam_ra_camtg",
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"cam_ck"/* parent */, 2),
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};
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/* get spm power status struct to register inside clk_data */
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static struct pwr_status cam_rb_pwr_stat = GATE_PWR_STAT(0xEF0,
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0xEF4, INV_OFS, BIT(25), BIT(25));
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static const struct mtk_gate_regs cam_rb_cg_regs = {
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.set_ofs = 0x4,
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.clr_ofs = 0x8,
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.sta_ofs = 0x0,
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};
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#define GATE_CAM_RB(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &cam_rb_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr, \
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.pwr_stat = &cam_rb_pwr_stat, \
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}
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static const struct mtk_gate cam_rb_clks[] = {
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GATE_CAM_RB(CLK_CAM_RB_LARBX, "cam_rb_larbx",
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"cam_ck"/* parent */, 0),
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GATE_CAM_RB(CLK_CAM_RB_CAM, "cam_rb_cam",
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"cam_ck"/* parent */, 1),
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GATE_CAM_RB(CLK_CAM_RB_CAMTG, "cam_rb_camtg",
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"cam_ck"/* parent */, 2),
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};
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static int clk_mt6877_cam_m_probe(struct platform_device *pdev)
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{
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struct clk_onecell_data *clk_data;
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int r;
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struct device_node *node = pdev->dev.of_node;
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#if MT_CCF_BRINGUP
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pr_notice("%s init begin\n", __func__);
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#endif
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clk_data = mtk_alloc_clk_data(CLK_CAM_M_NR_CLK);
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mtk_clk_register_gates(node, cam_m_clks, ARRAY_SIZE(cam_m_clks),
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clk_data);
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r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
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if (r)
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pr_err("%s(): could not register clock provider: %d\n",
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__func__, r);
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#if MT_CCF_BRINGUP
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pr_notice("%s init end\n", __func__);
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#endif
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return r;
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}
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static int clk_mt6877_cam_ra_probe(struct platform_device *pdev)
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{
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struct clk_onecell_data *clk_data;
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int r;
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struct device_node *node = pdev->dev.of_node;
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#if MT_CCF_BRINGUP
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pr_notice("%s init begin\n", __func__);
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#endif
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clk_data = mtk_alloc_clk_data(CLK_CAM_RA_NR_CLK);
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mtk_clk_register_gates(node, cam_ra_clks, ARRAY_SIZE(cam_ra_clks),
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clk_data);
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r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
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if (r)
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pr_err("%s(): could not register clock provider: %d\n",
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__func__, r);
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#if MT_CCF_BRINGUP
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pr_notice("%s init end\n", __func__);
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#endif
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return r;
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}
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static int clk_mt6877_cam_rb_probe(struct platform_device *pdev)
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{
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struct clk_onecell_data *clk_data;
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int r;
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struct device_node *node = pdev->dev.of_node;
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#if MT_CCF_BRINGUP
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pr_notice("%s init begin\n", __func__);
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#endif
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clk_data = mtk_alloc_clk_data(CLK_CAM_RB_NR_CLK);
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mtk_clk_register_gates(node, cam_rb_clks, ARRAY_SIZE(cam_rb_clks),
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clk_data);
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r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
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if (r)
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pr_err("%s(): could not register clock provider: %d\n",
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__func__, r);
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#if MT_CCF_BRINGUP
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pr_notice("%s init end\n", __func__);
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#endif
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return r;
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}
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static const struct of_device_id of_match_clk_mt6877_cam[] = {
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{
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.compatible = "mediatek,mt6877-camsys_main",
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.data = clk_mt6877_cam_m_probe,
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}, {
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.compatible = "mediatek,mt6877-camsys_rawa",
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.data = clk_mt6877_cam_ra_probe,
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}, {
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.compatible = "mediatek,mt6877-camsys_rawb",
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.data = clk_mt6877_cam_rb_probe,
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}, {
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/* sentinel */
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}
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};
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static int clk_mt6877_cam_probe(struct platform_device *pdev)
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{
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int (*clk_probe)(struct platform_device *pd);
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int r;
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clk_probe = of_device_get_match_data(&pdev->dev);
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if (!clk_probe)
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return -EINVAL;
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r = clk_probe(pdev);
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if (r)
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dev_err(&pdev->dev,
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"could not register clock provider: %s: %d\n",
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pdev->name, r);
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return r;
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}
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static struct platform_driver clk_mt6877_cam_drv = {
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.probe = clk_mt6877_cam_probe,
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.driver = {
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.name = "clk-mt6877-cam",
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.of_match_table = of_match_clk_mt6877_cam,
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},
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};
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static int __init clk_mt6877_cam_init(void)
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{
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return platform_driver_register(&clk_mt6877_cam_drv);
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}
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arch_initcall(clk_mt6877_cam_init);
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