832 lines
18 KiB
C
832 lines
18 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/backlight.h>
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#include <drm/drmP.h>
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#include <drm/drm_mipi_dsi.h>
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#include <drm/drm_panel.h>
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#include <linux/gpio/consumer.h>
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#include <linux/regulator/consumer.h>
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#include <video/mipi_display.h>
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#include <video/of_videomode.h>
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#include <video/videomode.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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// 0: 60HZCLK + DSC OFF; 1:60HZCLK + DSC ON; 2:90HZCLK + DSC ON
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#define DSC_ENABLE 2
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#define CONFIG_MTK_PANEL_EXT
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#if defined(CONFIG_MTK_PANEL_EXT)
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#include "../mediatek/mtk_panel_ext.h"
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#include "../mediatek/mtk_log.h"
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#include "../mediatek/mtk_drm_graphics_base.h"
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#endif
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#ifdef CONFIG_MTK_ROUND_CORNER_SUPPORT
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#include "../mediatek/mtk_corner_pattern/mtk_data_hw_roundedpattern.h"
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#endif
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struct lcm {
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struct device *dev;
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struct drm_panel panel;
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struct backlight_device *backlight;
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struct gpio_desc *reset_gpio;
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bool prepared;
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bool enabled;
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int error;
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};
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#define lcm_dcs_write_seq(ctx, seq...) \
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({\
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const u8 d[] = { seq };\
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BUILD_BUG_ON_MSG(ARRAY_SIZE(d) > 64, "DCS sequence too big for stack");\
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lcm_dcs_write(ctx, d, ARRAY_SIZE(d));\
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})
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#define lcm_dcs_write_seq_static(ctx, seq...) \
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({\
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static const u8 d[] = { seq };\
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lcm_dcs_write(ctx, d, ARRAY_SIZE(d));\
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})
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static inline struct lcm *panel_to_lcm(struct drm_panel *panel)
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{
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return container_of(panel, struct lcm, panel);
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}
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static void lcm_dcs_write(struct lcm *ctx, const void *data, size_t len)
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{
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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ssize_t ret;
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char *addr;
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if (ctx->error < 0)
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return;
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addr = (char *)data;
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if ((int)*addr < 0xB0)
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ret = mipi_dsi_dcs_write_buffer(dsi, data, len);
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else
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ret = mipi_dsi_generic_write(dsi, data, len);
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if (ret < 0) {
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dev_info(ctx->dev, "error %zd writing seq: %ph\n", ret, data);
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ctx->error = ret;
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}
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}
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#ifdef PANEL_SUPPORT_READBACK
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static int lcm_dcs_read(struct lcm *ctx, u8 cmd, void *data, size_t len)
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{
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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ssize_t ret;
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if (ctx->error < 0)
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return 0;
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ret = mipi_dsi_dcs_read(dsi, cmd, data, len);
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if (ret < 0) {
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dev_info(ctx->dev, "error %d reading dcs seq:(%#x)\n",
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ret, cmd);
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ctx->error = ret;
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}
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return ret;
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}
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static void lcm_panel_get_data(struct lcm *ctx)
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{
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u8 buffer[3] = {0};
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static int ret;
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if (ret == 0) {
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ret = lcm_dcs_read(ctx, 0x0A, buffer, 1);
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dev_info(ctx->dev, "return %d data(0x%08x) to dsi engine\n",
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ret, buffer[0] | (buffer[1] << 8));
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}
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}
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#endif
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#if defined(CONFIG_RT5081_PMU_DSV) || defined(CONFIG_MT6370_PMU_DSV)
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static struct regulator *disp_bias_pos;
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static struct regulator *disp_bias_neg;
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static int lcm_panel_bias_regulator_init(void)
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{
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static int regulator_inited;
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int ret = 0;
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if (regulator_inited)
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return ret;
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/* please only get regulator once in a driver */
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disp_bias_pos = regulator_get(NULL, "dsv_pos");
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if (IS_ERR(disp_bias_pos)) { /* handle return value */
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ret = PTR_ERR(disp_bias_pos);
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dev_info("get dsv_pos fail, error: %d\n", ret);
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return ret;
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}
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disp_bias_neg = regulator_get(NULL, "dsv_neg");
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if (IS_ERR(disp_bias_neg)) { /* handle return value */
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ret = PTR_ERR(disp_bias_neg);
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dev_info("get dsv_neg fail, error: %d\n", ret);
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return ret;
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}
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regulator_inited = 1;
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return ret; /* must be 0 */
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}
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static int lcm_panel_bias_enable(void)
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{
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int ret = 0;
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int retval = 0;
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lcm_panel_bias_regulator_init();
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/* set voltage with min & max*/
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ret = regulator_set_voltage(disp_bias_pos, 5400000, 5400000);
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if (ret < 0)
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dev_info("set voltage disp_bias_pos fail, ret = %d\n", ret);
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retval |= ret;
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ret = regulator_set_voltage(disp_bias_neg, 5400000, 5400000);
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if (ret < 0)
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dev_info("set voltage disp_bias_neg fail, ret = %d\n", ret);
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retval |= ret;
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/* enable regulator */
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ret = regulator_enable(disp_bias_pos);
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if (ret < 0)
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dev_info("enable regulator disp_bias_pos fail, ret = %d\n",
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ret);
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retval |= ret;
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ret = regulator_enable(disp_bias_neg);
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if (ret < 0)
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dev_info("enable regulator disp_bias_neg fail, ret = %d\n",
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ret);
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retval |= ret;
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return retval;
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}
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static int lcm_panel_bias_disable(void)
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{
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int ret = 0;
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int retval = 0;
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lcm_panel_bias_regulator_init();
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ret = regulator_disable(disp_bias_neg);
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if (ret < 0)
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dev_info("disable regulator disp_bias_neg fail, ret = %d\n",
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ret);
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retval |= ret;
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ret = regulator_disable(disp_bias_pos);
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if (ret < 0)
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dev_info("disable regulator disp_bias_pos fail, ret = %d\n",
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ret);
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retval |= ret;
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return retval;
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}
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#endif
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static void lcm_panel_init(struct lcm *ctx)
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{
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ctx->reset_gpio =
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devm_gpiod_get(ctx->dev, "reset", GPIOD_OUT_HIGH);
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gpiod_set_value(ctx->reset_gpio, 0);
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udelay(15 * 1000);
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gpiod_set_value(ctx->reset_gpio, 1);
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udelay(10 * 1000);
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gpiod_set_value(ctx->reset_gpio, 0);
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udelay(10 * 1000);
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gpiod_set_value(ctx->reset_gpio, 1);
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udelay(10 * 1000);
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devm_gpiod_put(ctx->dev, ctx->reset_gpio);
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lcm_dcs_write_seq_static(ctx, 0xFF, 0x25);
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lcm_dcs_write_seq_static(ctx, 0xFB, 0x01);
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#if (DSC_ENABLE == 2)
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lcm_dcs_write_seq_static(ctx, 0x18, 0x20); //90HZ CLK
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#else
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lcm_dcs_write_seq_static(ctx, 0x18, 0x21);//60HZ CLK
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#if (DSC_ENABLE == 1)
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lcm_dcs_write_seq_static(ctx, 0x20, 0x00);
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#endif
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#endif
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lcm_dcs_write_seq_static(ctx, 0xFF, 0x10);
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lcm_dcs_write_seq_static(ctx, 0xFB, 0x01);
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lcm_dcs_write_seq_static(ctx, 0xB0, 0x00);
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lcm_dcs_write_seq_static(ctx, 0x35, 0x00);
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#if (!DSC_ENABLE)
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lcm_dcs_write_seq_static(ctx, 0xC0, 0x00);//DSC OFF
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#else
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lcm_dcs_write_seq_static(ctx, 0xC1, 0x89, 0x28, 0x00, 0x14,
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0x02, 0x00, 0x02, 0x0E,
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0x01, 0xE8, 0x00, 0x07,
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0x05, 0x0E, 0x05, 0x16);
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lcm_dcs_write_seq_static(ctx, 0xC2, 0x10, 0xF0);
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lcm_dcs_write_seq_static(ctx, 0xC0, 0x03); //DSC ON
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#endif
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lcm_dcs_write_seq_static(ctx, 0x18, 0x21);
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lcm_dcs_write_seq_static(ctx, 0x11);
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msleep(140);
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lcm_dcs_write_seq_static(ctx, 0x29);
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msleep(40);
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}
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static int lcm_disable(struct drm_panel *panel)
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{
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struct lcm *ctx = panel_to_lcm(panel);
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if (!ctx->enabled)
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return 0;
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if (ctx->backlight) {
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ctx->backlight->props.power = FB_BLANK_POWERDOWN;
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backlight_update_status(ctx->backlight);
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}
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ctx->enabled = false;
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return 0;
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}
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static int lcm_unprepare(struct drm_panel *panel)
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{
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struct lcm *ctx = panel_to_lcm(panel);
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if (!ctx->prepared)
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return 0;
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lcm_dcs_write_seq_static(ctx, 0x28);
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lcm_dcs_write_seq_static(ctx, 0x10);
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msleep(120);
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lcm_dcs_write_seq_static(ctx, 0x4F, 0x01);
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msleep(120);
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ctx->error = 0;
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ctx->prepared = false;
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#if defined(CONFIG_RT5081_PMU_DSV) || defined(CONFIG_MT6370_PMU_DSV)
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lcm_panel_bias_disable();
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#endif
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return 0;
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}
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static int lcm_prepare(struct drm_panel *panel)
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{
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struct lcm *ctx = panel_to_lcm(panel);
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int ret;
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pr_info("%s\n", __func__);
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if (ctx->prepared)
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return 0;
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#if defined(CONFIG_RT5081_PMU_DSV) || defined(CONFIG_MT6370_PMU_DSV)
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lcm_panel_bias_enable();
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#endif
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lcm_panel_init(ctx);
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ret = ctx->error;
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if (ret < 0)
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lcm_unprepare(panel);
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ctx->prepared = true;
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#if defined(CONFIG_MTK_PANEL_EXT)
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mtk_panel_tch_rst(panel);
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#endif
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#ifdef PANEL_SUPPORT_READBACK
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lcm_panel_get_data(ctx);
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#endif
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return ret;
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}
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static int lcm_enable(struct drm_panel *panel)
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{
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struct lcm *ctx = panel_to_lcm(panel);
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if (ctx->enabled)
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return 0;
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if (ctx->backlight) {
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ctx->backlight->props.power = FB_BLANK_UNBLANK;
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backlight_update_status(ctx->backlight);
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}
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ctx->enabled = true;
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return 0;
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}
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#if (DSC_ENABLE == 2)
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static const struct drm_display_mode default_mode = {
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.clock = 320400,
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.hdisplay = 1080,
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.hsync_start = 1080 + 172, //HFP
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.hsync_end = 1080 + 172 + 16, //HSA
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.htotal = 1080 + 172 + 16 + 156, //HBP, 1424
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.vdisplay = 2400,
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.vsync_start = 2400 + 1286, //VFP
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.vsync_end = 2400 + 1286 + 10, //VSA
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.vtotal = 2400 + 1286 + 10 + 54, //VBP , 3750
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.vrefresh = 60,
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};
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static const struct drm_display_mode performance_mode = {
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.clock = 320400,
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.hdisplay = 1080,
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.hsync_start = 1080 + 172,
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.hsync_end = 1080 + 172 + 16,
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.htotal = 1080 + 172 + 16 + 156,
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.vdisplay = 2400,
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.vsync_start = 2400 + 36,
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.vsync_end = 2400 + 36 + 10,
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.vtotal = 2400 + 36 + 10 + 54, //2500
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.vrefresh = 90,
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};
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#else
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#if (DSC_ENABLE == 1)
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static const struct drm_display_mode default_mode = {
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.clock = 320400,
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.hdisplay = 1080,
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.hsync_start = 1080 + 172, //HFP
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.hsync_end = 1080 + 172 + 16, //HSA
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.htotal = 1080 + 172 + 16 + 156, //HBP, 1424
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.vdisplay = 2400,
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.vsync_start = 2400 + 1286, //VFP
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.vsync_end = 2400 + 1286 + 10, //VSA
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.vtotal = 2400 + 1286 + 10 + 54, //VBP , 3750
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.vrefresh = 60,
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};
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#else
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static const struct drm_display_mode default_mode = {
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.clock = 187200,
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.hdisplay = 1080,
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.hsync_start = 1080 + 102, //HFP
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.hsync_end = 1080 + 102 + 16, //HSA
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.htotal = 1080 + 102 + 16 + 50, //HBP, 1248
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.vdisplay = 2400,
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.vsync_start = 2400 + 36, //VFP
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.vsync_end = 2400 + 36 + 10, //VSA
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.vtotal = 2400 + 36 + 10 + 54, //VBP
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.vrefresh = 60,
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};
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#endif
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#endif
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#if defined(CONFIG_MTK_PANEL_EXT)
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static int panel_ext_reset(struct drm_panel *panel, int on)
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{
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struct lcm *ctx = panel_to_lcm(panel);
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ctx->reset_gpio =
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devm_gpiod_get(ctx->dev, "reset", GPIOD_OUT_HIGH);
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gpiod_set_value(ctx->reset_gpio, on);
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devm_gpiod_put(ctx->dev, ctx->reset_gpio);
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return 0;
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}
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static int panel_ata_check(struct drm_panel *panel)
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{
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struct lcm *ctx = panel_to_lcm(panel);
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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unsigned char data[3];
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unsigned char id[3] = {0x00, 0x00, 0x00};
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ssize_t ret;
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pr_info("%s success\n", __func__);
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#if 0
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ret = mipi_dsi_dcs_read(dsi, 0x4, data, 3);
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if (ret < 0)
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dev_info("%s error\n", __func__);
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DDPINFO("ATA read data %x %x %x\n", data[0], data[1], data[2]);
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if (data[0] == id[0] &&
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data[1] == id[1] &&
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data[2] == id[2])
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return 1;
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DDPINFO("ATA expect read data is %x %x %x\n",
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id[0], id[1], id[2]);
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#endif
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return 1;
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}
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static int lcm_setbacklight_cmdq(void *dsi, dcs_write_gce cb,
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void *handle, unsigned int level)
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{
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char bl_tb0[] = {0x51, 0xFF};
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bl_tb0[1] = level;
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if (!cb)
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return -1;
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cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
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return 0;
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}
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#if (DSC_ENABLE == 2)
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static struct mtk_panel_params ext_params = {
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.data_rate = 1080,
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.vfp_low_power = 2600,
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.cust_esd_check = 0,
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.esd_check_enable = 1,
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.lcm_esd_check_table[0] = {
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.cmd = 0x0a,
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.count = 1,
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.para_list[0] = 0x9c,
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},
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.output_mode = MTK_PANEL_DSC_SINGLE_PORT,
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.dyn_fps = {
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.switch_en = 1,
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.vact_timing_fps = 90,
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},
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.dsc_params = {
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.enable = 1,
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.ver = 17,
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.slice_mode = 1,
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.rgb_swap = 0,
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.dsc_cfg = 34,
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.rct_on = 1,
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.bit_per_channel = 8,
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.dsc_line_buf_depth = 9,
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.bp_enable = 1,
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.bit_per_pixel = 128,
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.pic_height = 2400,
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.pic_width = 1080,
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.slice_height = 20,
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.slice_width = 540,
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.chunk_size = 540,
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.xmit_delay = 512,
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.dec_delay = 526,
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.scale_value = 32,
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.increment_interval = 488,
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.decrement_interval = 7,
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.line_bpg_offset = 12,
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.nfl_bpg_offset = 1294,
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.slice_bpg_offset = 1302,
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.initial_offset = 6144,
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.final_offset = 4336,
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.flatness_minqp = 3,
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.flatness_maxqp = 12,
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.rc_model_size = 8192,
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.rc_edge_factor = 6,
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.rc_quant_incr_limit0 = 11,
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.rc_quant_incr_limit1 = 11,
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.rc_tgt_offset_hi = 3,
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.rc_tgt_offset_lo = 3,
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},
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};
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static struct mtk_panel_params ext_params_90hz = {
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.data_rate = 1080,
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.vfp_low_power = 2600,
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.cust_esd_check = 0,
|
|
.esd_check_enable = 1,
|
|
.lcm_esd_check_table[0] = {
|
|
.cmd = 0x0a,
|
|
.count = 1,
|
|
.para_list[0] = 0x9c,
|
|
},
|
|
.dyn_fps = {
|
|
.switch_en = 1,
|
|
.vact_timing_fps = 90,
|
|
},
|
|
.output_mode = MTK_PANEL_DSC_SINGLE_PORT,
|
|
.dsc_params = {
|
|
.enable = 1,
|
|
.ver = 17,
|
|
.slice_mode = 1,
|
|
.rgb_swap = 0,
|
|
.dsc_cfg = 34,
|
|
.rct_on = 1,
|
|
.bit_per_channel = 8,
|
|
.dsc_line_buf_depth = 9,
|
|
.bp_enable = 1,
|
|
.bit_per_pixel = 128,
|
|
.pic_height = 2400,
|
|
.pic_width = 1080,
|
|
.slice_height = 20,
|
|
.slice_width = 540,
|
|
.chunk_size = 540,
|
|
.xmit_delay = 512,
|
|
.dec_delay = 526,
|
|
.scale_value = 32,
|
|
.increment_interval = 488,
|
|
.decrement_interval = 7,
|
|
.line_bpg_offset = 12,
|
|
.nfl_bpg_offset = 1294,
|
|
.slice_bpg_offset = 1302,
|
|
.initial_offset = 6144,
|
|
.final_offset = 4336,
|
|
.flatness_minqp = 3,
|
|
.flatness_maxqp = 12,
|
|
.rc_model_size = 8192,
|
|
.rc_edge_factor = 6,
|
|
.rc_quant_incr_limit0 = 11,
|
|
.rc_quant_incr_limit1 = 11,
|
|
.rc_tgt_offset_hi = 3,
|
|
.rc_tgt_offset_lo = 3,
|
|
},
|
|
};
|
|
|
|
static int mtk_panel_ext_param_set(struct drm_panel *panel,
|
|
unsigned int mode)
|
|
{
|
|
struct mtk_panel_ext *ext = find_panel_ext(panel);
|
|
int ret = 0;
|
|
|
|
if (mode == 0)
|
|
ext->params = &ext_params;
|
|
else if (mode == 1)
|
|
ext->params = &ext_params_90hz;
|
|
else
|
|
ret = 1;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int mtk_panel_ext_param_get(struct mtk_panel_params *ext_para,
|
|
unsigned int mode)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (mode == 0)
|
|
ext_para = &ext_params;
|
|
else if (mode == 1)
|
|
ext_para = &ext_params_90hz;
|
|
else
|
|
ret = 1;
|
|
|
|
return ret;
|
|
|
|
}
|
|
#else
|
|
#if (DSC_ENABLE == 1)
|
|
static struct mtk_panel_params ext_params = {
|
|
.data_rate = 1080,
|
|
.pll_clk = 540,
|
|
.cust_esd_check = 0,
|
|
.esd_check_enable = 1,
|
|
.lcm_esd_check_table[0] = {
|
|
.cmd = 0x0a,
|
|
.count = 1,
|
|
.para_list[0] = 0x9c,
|
|
},
|
|
.output_mode = MTK_PANEL_DSC_SINGLE_PORT,
|
|
.dsc_params = {
|
|
.enable = 1,
|
|
.ver = 17,
|
|
.slice_mode = 1,
|
|
.rgb_swap = 0,
|
|
.dsc_cfg = 34,
|
|
.rct_on = 1,
|
|
.bit_per_channel = 8,
|
|
.dsc_line_buf_depth = 9,//11
|
|
.bp_enable = 1,
|
|
.bit_per_pixel = 128,
|
|
.pic_height = 2400,
|
|
.pic_width = 1080,
|
|
.slice_height = 20,
|
|
.slice_width = 540,
|
|
.chunk_size = 540,
|
|
.xmit_delay = 512,
|
|
.dec_delay = 526,
|
|
.scale_value = 32,
|
|
.increment_interval = 488,
|
|
.decrement_interval = 7,
|
|
.line_bpg_offset = 12,
|
|
.nfl_bpg_offset = 1294,
|
|
.slice_bpg_offset = 1302,
|
|
.initial_offset = 6144,
|
|
.final_offset = 4336,
|
|
.flatness_minqp = 3,
|
|
.flatness_maxqp = 12,
|
|
.rc_model_size = 8192,
|
|
.rc_edge_factor = 6,
|
|
.rc_quant_incr_limit0 = 11,
|
|
.rc_quant_incr_limit1 = 11,
|
|
.rc_tgt_offset_hi = 3,
|
|
.rc_tgt_offset_lo = 3,
|
|
},
|
|
};
|
|
|
|
#else
|
|
static struct mtk_panel_params ext_params = {
|
|
.pll_clk = 610,
|
|
.cust_esd_check = 0,
|
|
.esd_check_enable = 1,
|
|
.lcm_esd_check_table[0] = {
|
|
.cmd = 0x0a,
|
|
.count = 1,
|
|
.para_list[0] = 0x9c,
|
|
},
|
|
};
|
|
#endif
|
|
#endif
|
|
|
|
|
|
static struct mtk_panel_funcs ext_funcs = {
|
|
.reset = panel_ext_reset,
|
|
.set_backlight_cmdq = lcm_setbacklight_cmdq,
|
|
.ata_check = panel_ata_check,
|
|
#if (DSC_ENABLE == 2)
|
|
.ext_param_set = mtk_panel_ext_param_set,
|
|
.ext_param_get = mtk_panel_ext_param_get,
|
|
#endif
|
|
};
|
|
#endif
|
|
|
|
struct panel_desc {
|
|
const struct drm_display_mode *modes;
|
|
unsigned int num_modes;
|
|
|
|
unsigned int bpc;
|
|
|
|
struct {
|
|
unsigned int width;
|
|
unsigned int height;
|
|
} size;
|
|
|
|
struct {
|
|
unsigned int prepare;
|
|
unsigned int enable;
|
|
unsigned int disable;
|
|
unsigned int unprepare;
|
|
} delay;
|
|
};
|
|
|
|
static int lcm_get_modes(struct drm_panel *panel)
|
|
{
|
|
struct drm_display_mode *mode;
|
|
#if (DSC_ENABLE == 2)
|
|
struct drm_display_mode *mode2;
|
|
#endif
|
|
|
|
mode = drm_mode_duplicate(panel->drm, &default_mode);
|
|
if (!mode) {
|
|
dev_info(panel->drm->dev, "failed to add mode %ux%ux@%u\n",
|
|
default_mode.hdisplay, default_mode.vdisplay,
|
|
default_mode.vrefresh);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
drm_mode_set_name(mode);
|
|
mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
|
|
drm_mode_probed_add(panel->connector, mode);
|
|
|
|
#if (DSC_ENABLE == 2)
|
|
mode2 = drm_mode_duplicate(panel->drm, &performance_mode);
|
|
if (!mode2) {
|
|
dev_info(panel->drm->dev, "failed to add mode %ux%ux@%u\n",
|
|
performance_mode.hdisplay,
|
|
performance_mode.vdisplay,
|
|
performance_mode.vrefresh);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
drm_mode_set_name(mode2);
|
|
mode2->type = DRM_MODE_TYPE_DRIVER;
|
|
drm_mode_probed_add(panel->connector, mode2);
|
|
#endif
|
|
|
|
panel->connector->display_info.width_mm = 64;
|
|
panel->connector->display_info.height_mm = 129;
|
|
|
|
return 1;
|
|
}
|
|
|
|
static const struct drm_panel_funcs lcm_drm_funcs = {
|
|
.disable = lcm_disable,
|
|
.unprepare = lcm_unprepare,
|
|
.prepare = lcm_prepare,
|
|
.enable = lcm_enable,
|
|
.get_modes = lcm_get_modes,
|
|
};
|
|
|
|
static int lcm_probe(struct mipi_dsi_device *dsi)
|
|
{
|
|
struct device *dev = &dsi->dev;
|
|
struct lcm *ctx;
|
|
struct device_node *backlight;
|
|
int ret;
|
|
|
|
ctx = devm_kzalloc(dev, sizeof(struct lcm), GFP_KERNEL);
|
|
if (!ctx)
|
|
return -ENOMEM;
|
|
|
|
mipi_dsi_set_drvdata(dsi, ctx);
|
|
|
|
ctx->dev = dev;
|
|
dsi->lanes = 4;
|
|
dsi->format = MIPI_DSI_FMT_RGB888;
|
|
dsi->mode_flags = MIPI_DSI_MODE_VIDEO
|
|
| MIPI_DSI_MODE_VIDEO_SYNC_PULSE
|
|
| MIPI_DSI_MODE_LPM
|
|
| MIPI_DSI_MODE_EOT_PACKET
|
|
| MIPI_DSI_CLOCK_NON_CONTINUOUS;
|
|
|
|
backlight = of_parse_phandle(dev->of_node, "backlight", 0);
|
|
if (backlight) {
|
|
ctx->backlight = of_find_backlight_by_node(backlight);
|
|
of_node_put(backlight);
|
|
|
|
if (!ctx->backlight)
|
|
return -EPROBE_DEFER;
|
|
}
|
|
|
|
ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
|
|
if (IS_ERR(ctx->reset_gpio)) {
|
|
dev_info(dev, "cannot get reset-gpios %ld\n",
|
|
PTR_ERR(ctx->reset_gpio));
|
|
return PTR_ERR(ctx->reset_gpio);
|
|
}
|
|
devm_gpiod_put(dev, ctx->reset_gpio);
|
|
ctx->prepared = true;
|
|
ctx->enabled = true;
|
|
|
|
drm_panel_init(&ctx->panel);
|
|
ctx->panel.dev = dev;
|
|
ctx->panel.funcs = &lcm_drm_funcs;
|
|
|
|
ret = drm_panel_add(&ctx->panel);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = mipi_dsi_attach(dsi);
|
|
if (ret < 0)
|
|
drm_panel_remove(&ctx->panel);
|
|
|
|
#if defined(CONFIG_MTK_PANEL_EXT)
|
|
mtk_panel_tch_handle_reg(&ctx->panel);
|
|
ret = mtk_panel_ext_create(dev, &ext_params, &ext_funcs, &ctx->panel);
|
|
if (ret < 0)
|
|
return ret;
|
|
#endif
|
|
|
|
pr_info("%s-\n", __func__);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int lcm_remove(struct mipi_dsi_device *dsi)
|
|
{
|
|
struct lcm *ctx = mipi_dsi_get_drvdata(dsi);
|
|
|
|
mipi_dsi_detach(dsi);
|
|
drm_panel_remove(&ctx->panel);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id lcm_of_match[] = {
|
|
{ .compatible = "hx,nt36682c,dphy,vdo", },
|
|
{ }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, lcm_of_match);
|
|
|
|
static struct mipi_dsi_driver lcm_driver = {
|
|
.probe = lcm_probe,
|
|
.remove = lcm_remove,
|
|
.driver = {
|
|
.name = "panel-hx-nt36682c-dphy-vdo",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = lcm_of_match,
|
|
},
|
|
};
|
|
|
|
module_mipi_dsi_driver(lcm_driver);
|
|
|
|
MODULE_AUTHOR("MEDIATEK");
|
|
MODULE_DESCRIPTION("huaxing nt36672c VDO LCD Panel Driver");
|
|
MODULE_LICENSE("GPL v2");
|