257 lines
8.9 KiB
C
257 lines
8.9 KiB
C
/*
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Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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* Neither the name of Trident Microsystems nor Hauppauge Computer Works
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nor the names of its contributors may be used to endorse or promote
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products derived from this software without specific prior written
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permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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/*******************************************************************************
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* FILENAME: $Id: drx_dap_fasi.h,v 1.5 2009/07/07 14:21:40 justin Exp $
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*
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* DESCRIPTION:
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* Part of DRX driver.
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* Data access protocol: Fast Access Sequential Interface (fasi)
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* Fast access, because of short addressing format (16 instead of 32 bits addr)
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* Sequential, because of I2C.
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*
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* USAGE:
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* Include.
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*
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* NOTES:
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*
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*
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*******************************************************************************/
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/*-------- compilation control switches --------------------------------------*/
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#ifndef __DRX_DAP_FASI_H__
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#define __DRX_DAP_FASI_H__
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/*-------- Required includes -------------------------------------------------*/
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#include "drx_driver.h"
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/*-------- Defines, configuring the API --------------------------------------*/
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/********************************************
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* Allowed address formats
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********************************************/
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/*
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* Comments about short/long addressing format:
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*
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* The DAP FASI offers long address format (4 bytes) and short address format
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* (2 bytes). The DAP can operate in 3 modes:
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* (1) only short
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* (2) only long
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* (3) both long and short but short preferred and long only when necesarry
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*
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* These modes must be selected compile time via compile switches.
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* Compile switch settings for the different modes:
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* (1) DRXDAPFASI_LONG_ADDR_ALLOWED=0, DRXDAPFASI_SHORT_ADDR_ALLOWED=1
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* (2) DRXDAPFASI_LONG_ADDR_ALLOWED=1, DRXDAPFASI_SHORT_ADDR_ALLOWED=0
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* (3) DRXDAPFASI_LONG_ADDR_ALLOWED=1, DRXDAPFASI_SHORT_ADDR_ALLOWED=1
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*
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* The default setting will be (3) both long and short.
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* The default setting will need no compile switches.
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* The default setting must be overridden if compile switches are already
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* defined.
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*
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*/
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/* set default */
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#if !defined(DRXDAPFASI_LONG_ADDR_ALLOWED)
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#define DRXDAPFASI_LONG_ADDR_ALLOWED 1
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#endif
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/* set default */
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#if !defined(DRXDAPFASI_SHORT_ADDR_ALLOWED)
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#define DRXDAPFASI_SHORT_ADDR_ALLOWED 1
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#endif
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/* check */
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#if ((DRXDAPFASI_LONG_ADDR_ALLOWED == 0) && \
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(DRXDAPFASI_SHORT_ADDR_ALLOWED == 0))
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#error At least one of short- or long-addressing format must be allowed.
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*; /* illegal statement to force compiler error */
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#endif
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/********************************************
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* Single/master multi master setting
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********************************************/
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/*
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* Comments about SINGLE MASTER/MULTI MASTER modes:
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*
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* Consider the two sides:1) the master and 2)the slave.
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*
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* Master:
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* Single/multimaster operation set via DRXDAP_SINGLE_MASTER compile switch
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* + single master mode means no use of repeated starts
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* + multi master mode means use of repeated starts
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* Default is single master.
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* Default can be overriden by setting the compile switch DRXDAP_SINGLE_MASTER.
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*
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* Slave:
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* Single/multi master selected via the flags in the FASI protocol.
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* + single master means remember memory address between i2c packets
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* + multimaster means flush memory address between i2c packets
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* Default is single master, DAP FASI changes multi-master setting silently
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* into single master setting. This cannot be overrriden.
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*
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*/
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/* set default */
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#ifndef DRXDAP_SINGLE_MASTER
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#define DRXDAP_SINGLE_MASTER 0
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#endif
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/********************************************
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* Chunk/mode checking
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********************************************/
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/*
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* Comments about DRXDAP_MAX_WCHUNKSIZE in single or multi master mode and
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* in combination with short and long addressing format. All text below
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* assumes long addressing format. The table also includes information
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* for short ADDRessing format.
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*
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* In single master mode, data can be written by sending the register address
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* first, then two or four bytes of data in the next packet.
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* Because the device address plus a register address equals five bytes,
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* the mimimum chunk size must be five.
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* If ten-bit I2C device addresses are used, the minimum chunk size must be six,
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* because the I2C device address will then occupy two bytes when writing.
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*
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* Data in single master mode is transferred as follows:
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* <S> <devW> a0 a1 a2 a3 <P>
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* <S> <devW> d0 d1 [d2 d3] <P>
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* ..
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* or
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* ..
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* <S> <devW> a0 a1 a2 a3 <P>
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* <S> <devR> --- <P>
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*
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* In multi-master mode, the data must immediately follow the address (an I2C
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* stop resets the internal address), and hence the minimum chunk size is
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* 1 <I2C address> + 4 (register address) + 2 (data to send) = 7 bytes (8 if
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* 10-bit I2C device addresses are used).
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*
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* The 7-bit or 10-bit i2c address parameters is a runtime parameter.
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* The other parameters can be limited via compile time switches.
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*
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*-------------------------------------------------------------------------------
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*
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* Minimum chunk size table (in bytes):
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*
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* +----------------+----------------+
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* | 7b i2c addr | 10b i2c addr |
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* +----------------+----------------+
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* | single | multi | single | multi |
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* ------+--------+-------+--------+-------+
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* short | 3 | 5 | 4 | 6 |
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* long | 5 | 7 | 6 | 8 |
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* ------+--------+-------+--------+-------+
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*
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*/
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/* set default */
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#if !defined(DRXDAP_MAX_WCHUNKSIZE)
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#define DRXDAP_MAX_WCHUNKSIZE 254
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#endif
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/* check */
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#if ((DRXDAPFASI_LONG_ADDR_ALLOWED == 0) && (DRXDAPFASI_SHORT_ADDR_ALLOWED == 1))
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#if DRXDAP_SINGLE_MASTER
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#define DRXDAP_MAX_WCHUNKSIZE_MIN 3
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#else
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#define DRXDAP_MAX_WCHUNKSIZE_MIN 5
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#endif
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#else
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#if DRXDAP_SINGLE_MASTER
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#define DRXDAP_MAX_WCHUNKSIZE_MIN 5
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#else
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#define DRXDAP_MAX_WCHUNKSIZE_MIN 7
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#endif
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#endif
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#if DRXDAP_MAX_WCHUNKSIZE < DRXDAP_MAX_WCHUNKSIZE_MIN
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#if ((DRXDAPFASI_LONG_ADDR_ALLOWED == 0) && (DRXDAPFASI_SHORT_ADDR_ALLOWED == 1))
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#if DRXDAP_SINGLE_MASTER
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#error DRXDAP_MAX_WCHUNKSIZE must be at least 3 in single master mode
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*; /* illegal statement to force compiler error */
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#else
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#error DRXDAP_MAX_WCHUNKSIZE must be at least 5 in multi master mode
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*; /* illegal statement to force compiler error */
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#endif
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#else
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#if DRXDAP_SINGLE_MASTER
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#error DRXDAP_MAX_WCHUNKSIZE must be at least 5 in single master mode
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*; /* illegal statement to force compiler error */
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#else
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#error DRXDAP_MAX_WCHUNKSIZE must be at least 7 in multi master mode
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*; /* illegal statement to force compiler error */
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#endif
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#endif
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#endif
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/* set default */
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#if !defined(DRXDAP_MAX_RCHUNKSIZE)
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#define DRXDAP_MAX_RCHUNKSIZE 254
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#endif
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/* check */
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#if DRXDAP_MAX_RCHUNKSIZE < 2
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#error DRXDAP_MAX_RCHUNKSIZE must be at least 2
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*; /* illegal statement to force compiler error */
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#endif
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/* check */
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#if DRXDAP_MAX_RCHUNKSIZE & 1
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#error DRXDAP_MAX_RCHUNKSIZE must be even
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*; /* illegal statement to force compiler error */
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#endif
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/*-------- Public API functions ----------------------------------------------*/
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extern struct drx_access_func drx_dap_fasi_funct_g;
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#define DRXDAP_FASI_RMW 0x10000000
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#define DRXDAP_FASI_BROADCAST 0x20000000
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#define DRXDAP_FASI_CLEARCRC 0x80000000
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#define DRXDAP_FASI_SINGLE_MASTER 0xC0000000
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#define DRXDAP_FASI_MULTI_MASTER 0x40000000
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#define DRXDAP_FASI_SMM_SWITCH 0x40000000 /* single/multi master switch */
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#define DRXDAP_FASI_MODEFLAGS 0xC0000000
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#define DRXDAP_FASI_FLAGS 0xF0000000
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#define DRXDAP_FASI_ADDR2BLOCK(addr) (((addr)>>22)&0x3F)
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#define DRXDAP_FASI_ADDR2BANK(addr) (((addr)>>16)&0x3F)
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#define DRXDAP_FASI_ADDR2OFFSET(addr) ((addr)&0x7FFF)
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#define DRXDAP_FASI_SHORT_FORMAT(addr) (((addr) & 0xFC30FF80) == 0)
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#define DRXDAP_FASI_LONG_FORMAT(addr) (((addr) & 0xFC30FF80) != 0)
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#define DRXDAP_FASI_OFFSET_TOO_LARGE(addr) (((addr) & 0x00008000) != 0)
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#endif /* __DRX_DAP_FASI_H__ */
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