66 lines
1.4 KiB
C
66 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Joey Pan <joey.pan@mediatek.com>
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*/
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#ifndef _LCM_DEFINE_H
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#define _LCM_DEFINE_H
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#if defined(MTK_LCM_DEVICE_TREE_SUPPORT)
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/* LCM_FUNC */
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#define LCM_FUNC_GPIO 1
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#define LCM_FUNC_I2C 2
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#define LCM_FUNC_UTIL 3
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#define LCM_FUNC_CMD 4
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/* LCM_GPIO_TYPE */
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#define LCM_GPIO_MODE 1
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#define LCM_GPIO_DIR 2
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#define LCM_GPIO_OUT 3
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/* LCM_GPIO_MODE_DATA */
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#define LCM_GPIO_MODE_00 0
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#define LCM_GPIO_MODE_01 1
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#define LCM_GPIO_MODE_02 2
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#define LCM_GPIO_MODE_03 3
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#define LCM_GPIO_MODE_04 4
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#define LCM_GPIO_MODE_05 5
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#define LCM_GPIO_MODE_06 6
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#define LCM_GPIO_MODE_07 7
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#define MAX_LCM_GPIO_MODE 8
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/* LCM_GPIO_DIR_DATA */
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#define LCM_GPIO_DIR_IN 0
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#define LCM_GPIO_DIR_OUT 1
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/* LCM_GPIO_OUT_DATA */
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#define LCM_GPIO_OUT_ZERO 0
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#define LCM_GPIO_OUT_ONE 1
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/* LCM_I2C_TYPE */
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#define LCM_I2C_WRITE 1
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/* LCM_UTIL_TYPE */
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#define LCM_UTIL_RESET 1
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#define LCM_UTIL_MDELAY 2
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#define LCM_UTIL_UDELAY 3
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#define LCM_UTIL_WRITE_CMD_V1 4
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#define LCM_UTIL_WRITE_CMD_V2 5
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#define LCM_UTIL_READ_CMD_V1 6
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#define LCM_UTIL_READ_CMD_V2 7
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#define LCM_UTIL_WRITE_CMD_V21 8
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#define LCM_UTIL_WRITE_CMD_V22 9
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#define LCM_UTIL_WRITE_CMD_V23 10
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#define LCM_UTIL_RAR 11
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/* LCM_UTIL_RESET_DATA */
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#define LCM_UTIL_RESET_LOW 0
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#define LCM_UTIL_RESET_HIGH 1
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/* LCM_UTIL_WRITE_CMD_V2_DATA */
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#define LCM_UTIL_WRITE_CMD_V2_NULL 0xF9
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#endif
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#endif /* _LCM_DEFINE_H */
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