6db4831e98
Android 14
360 lines
8.4 KiB
C
360 lines
8.4 KiB
C
/*
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* Intel MIC Platform Software Stack (MPSS)
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*
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* Copyright(c) 2014 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* Intel SCIF driver.
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*
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*/
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#include <linux/module.h>
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#include <linux/idr.h>
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#include <linux/mic_common.h>
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#include "../common/mic_dev.h"
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#include "../bus/scif_bus.h"
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#include "scif_peer_bus.h"
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#include "scif_main.h"
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#include "scif_map.h"
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struct scif_info scif_info = {
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.mdev = {
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.minor = MISC_DYNAMIC_MINOR,
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.name = "scif",
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.fops = &scif_fops,
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}
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};
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struct scif_dev *scif_dev;
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struct kmem_cache *unaligned_cache;
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static atomic_t g_loopb_cnt;
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/* Runs in the context of intr_wq */
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static void scif_intr_bh_handler(struct work_struct *work)
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{
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struct scif_dev *scifdev =
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container_of(work, struct scif_dev, intr_bh);
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if (scifdev_self(scifdev))
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scif_loopb_msg_handler(scifdev, scifdev->qpairs);
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else
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scif_nodeqp_intrhandler(scifdev, scifdev->qpairs);
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}
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int scif_setup_intr_wq(struct scif_dev *scifdev)
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{
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if (!scifdev->intr_wq) {
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snprintf(scifdev->intr_wqname, sizeof(scifdev->intr_wqname),
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"SCIF INTR %d", scifdev->node);
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scifdev->intr_wq =
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alloc_ordered_workqueue(scifdev->intr_wqname, 0);
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if (!scifdev->intr_wq)
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return -ENOMEM;
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INIT_WORK(&scifdev->intr_bh, scif_intr_bh_handler);
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}
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return 0;
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}
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void scif_destroy_intr_wq(struct scif_dev *scifdev)
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{
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if (scifdev->intr_wq) {
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destroy_workqueue(scifdev->intr_wq);
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scifdev->intr_wq = NULL;
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}
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}
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irqreturn_t scif_intr_handler(int irq, void *data)
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{
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struct scif_dev *scifdev = data;
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struct scif_hw_dev *sdev = scifdev->sdev;
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sdev->hw_ops->ack_interrupt(sdev, scifdev->db);
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queue_work(scifdev->intr_wq, &scifdev->intr_bh);
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return IRQ_HANDLED;
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}
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static void scif_qp_setup_handler(struct work_struct *work)
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{
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struct scif_dev *scifdev = container_of(work, struct scif_dev,
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qp_dwork.work);
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struct scif_hw_dev *sdev = scifdev->sdev;
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dma_addr_t da = 0;
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int err;
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if (scif_is_mgmt_node()) {
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struct mic_bootparam *bp = sdev->dp;
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da = bp->scif_card_dma_addr;
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scifdev->rdb = bp->h2c_scif_db;
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} else {
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struct mic_bootparam __iomem *bp = sdev->rdp;
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da = readq(&bp->scif_host_dma_addr);
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scifdev->rdb = ioread8(&bp->c2h_scif_db);
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}
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if (da) {
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err = scif_qp_response(da, scifdev);
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if (err)
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dev_err(&scifdev->sdev->dev,
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"scif_qp_response err %d\n", err);
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} else {
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schedule_delayed_work(&scifdev->qp_dwork,
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msecs_to_jiffies(1000));
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}
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}
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static int scif_setup_scifdev(void)
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{
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/* We support a maximum of 129 SCIF nodes including the mgmt node */
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#define MAX_SCIF_NODES 129
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int i;
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u8 num_nodes = MAX_SCIF_NODES;
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scif_dev = kcalloc(num_nodes, sizeof(*scif_dev), GFP_KERNEL);
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if (!scif_dev)
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return -ENOMEM;
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for (i = 0; i < num_nodes; i++) {
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struct scif_dev *scifdev = &scif_dev[i];
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scifdev->node = i;
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scifdev->exit = OP_IDLE;
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init_waitqueue_head(&scifdev->disconn_wq);
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mutex_init(&scifdev->lock);
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INIT_WORK(&scifdev->peer_add_work, scif_add_peer_device);
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INIT_DELAYED_WORK(&scifdev->p2p_dwork,
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scif_poll_qp_state);
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INIT_DELAYED_WORK(&scifdev->qp_dwork,
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scif_qp_setup_handler);
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INIT_LIST_HEAD(&scifdev->p2p);
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RCU_INIT_POINTER(scifdev->spdev, NULL);
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}
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return 0;
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}
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static void scif_destroy_scifdev(void)
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{
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kfree(scif_dev);
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}
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static int scif_probe(struct scif_hw_dev *sdev)
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{
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struct scif_dev *scifdev = &scif_dev[sdev->dnode];
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int rc;
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dev_set_drvdata(&sdev->dev, sdev);
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scifdev->sdev = sdev;
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if (1 == atomic_add_return(1, &g_loopb_cnt)) {
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struct scif_dev *loopb_dev = &scif_dev[sdev->snode];
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loopb_dev->sdev = sdev;
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rc = scif_setup_loopback_qp(loopb_dev);
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if (rc)
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goto exit;
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}
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rc = scif_setup_intr_wq(scifdev);
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if (rc)
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goto destroy_loopb;
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rc = scif_setup_qp(scifdev);
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if (rc)
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goto destroy_intr;
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scifdev->db = sdev->hw_ops->next_db(sdev);
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scifdev->cookie = sdev->hw_ops->request_irq(sdev, scif_intr_handler,
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"SCIF_INTR", scifdev,
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scifdev->db);
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if (IS_ERR(scifdev->cookie)) {
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rc = PTR_ERR(scifdev->cookie);
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goto free_qp;
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}
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if (scif_is_mgmt_node()) {
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struct mic_bootparam *bp = sdev->dp;
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bp->c2h_scif_db = scifdev->db;
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bp->scif_host_dma_addr = scifdev->qp_dma_addr;
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} else {
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struct mic_bootparam __iomem *bp = sdev->rdp;
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iowrite8(scifdev->db, &bp->h2c_scif_db);
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writeq(scifdev->qp_dma_addr, &bp->scif_card_dma_addr);
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}
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schedule_delayed_work(&scifdev->qp_dwork,
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msecs_to_jiffies(1000));
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return rc;
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free_qp:
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scif_free_qp(scifdev);
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destroy_intr:
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scif_destroy_intr_wq(scifdev);
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destroy_loopb:
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if (atomic_dec_and_test(&g_loopb_cnt))
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scif_destroy_loopback_qp(&scif_dev[sdev->snode]);
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exit:
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return rc;
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}
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void scif_stop(struct scif_dev *scifdev)
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{
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struct scif_dev *dev;
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int i;
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for (i = scif_info.maxid; i >= 0; i--) {
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dev = &scif_dev[i];
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if (scifdev_self(dev))
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continue;
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scif_handle_remove_node(i);
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}
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}
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static void scif_remove(struct scif_hw_dev *sdev)
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{
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struct scif_dev *scifdev = &scif_dev[sdev->dnode];
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if (scif_is_mgmt_node()) {
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struct mic_bootparam *bp = sdev->dp;
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bp->c2h_scif_db = -1;
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bp->scif_host_dma_addr = 0x0;
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} else {
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struct mic_bootparam __iomem *bp = sdev->rdp;
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iowrite8(-1, &bp->h2c_scif_db);
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writeq(0x0, &bp->scif_card_dma_addr);
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}
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if (scif_is_mgmt_node()) {
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scif_disconnect_node(scifdev->node, true);
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} else {
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scif_info.card_initiated_exit = true;
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scif_stop(scifdev);
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}
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if (atomic_dec_and_test(&g_loopb_cnt))
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scif_destroy_loopback_qp(&scif_dev[sdev->snode]);
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if (scifdev->cookie) {
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sdev->hw_ops->free_irq(sdev, scifdev->cookie, scifdev);
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scifdev->cookie = NULL;
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}
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scif_destroy_intr_wq(scifdev);
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cancel_delayed_work(&scifdev->qp_dwork);
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scif_free_qp(scifdev);
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scifdev->rdb = -1;
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scifdev->sdev = NULL;
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}
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static struct scif_hw_dev_id id_table[] = {
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{ MIC_SCIF_DEV, SCIF_DEV_ANY_ID },
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{ 0 },
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};
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static struct scif_driver scif_driver = {
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.driver.name = KBUILD_MODNAME,
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.driver.owner = THIS_MODULE,
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.id_table = id_table,
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.probe = scif_probe,
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.remove = scif_remove,
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};
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static int _scif_init(void)
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{
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int rc;
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mutex_init(&scif_info.eplock);
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spin_lock_init(&scif_info.rmalock);
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spin_lock_init(&scif_info.nb_connect_lock);
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spin_lock_init(&scif_info.port_lock);
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mutex_init(&scif_info.conflock);
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mutex_init(&scif_info.connlock);
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mutex_init(&scif_info.fencelock);
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INIT_LIST_HEAD(&scif_info.uaccept);
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INIT_LIST_HEAD(&scif_info.listen);
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INIT_LIST_HEAD(&scif_info.zombie);
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INIT_LIST_HEAD(&scif_info.connected);
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INIT_LIST_HEAD(&scif_info.disconnected);
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INIT_LIST_HEAD(&scif_info.rma);
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INIT_LIST_HEAD(&scif_info.rma_tc);
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INIT_LIST_HEAD(&scif_info.mmu_notif_cleanup);
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INIT_LIST_HEAD(&scif_info.fence);
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INIT_LIST_HEAD(&scif_info.nb_connect_list);
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init_waitqueue_head(&scif_info.exitwq);
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scif_info.rma_tc_limit = SCIF_RMA_TEMP_CACHE_LIMIT;
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scif_info.en_msg_log = 0;
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scif_info.p2p_enable = 1;
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rc = scif_setup_scifdev();
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if (rc)
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goto error;
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unaligned_cache = kmem_cache_create("Unaligned_DMA",
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SCIF_KMEM_UNALIGNED_BUF_SIZE,
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0, SLAB_HWCACHE_ALIGN, NULL);
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if (!unaligned_cache) {
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rc = -ENOMEM;
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goto free_sdev;
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}
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INIT_WORK(&scif_info.misc_work, scif_misc_handler);
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INIT_WORK(&scif_info.mmu_notif_work, scif_mmu_notif_handler);
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INIT_WORK(&scif_info.conn_work, scif_conn_handler);
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idr_init(&scif_ports);
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return 0;
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free_sdev:
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scif_destroy_scifdev();
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error:
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return rc;
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}
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static void _scif_exit(void)
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{
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idr_destroy(&scif_ports);
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kmem_cache_destroy(unaligned_cache);
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scif_destroy_scifdev();
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}
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static int __init scif_init(void)
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{
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struct miscdevice *mdev = &scif_info.mdev;
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int rc;
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_scif_init();
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iova_cache_get();
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rc = scif_peer_bus_init();
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if (rc)
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goto exit;
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rc = scif_register_driver(&scif_driver);
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if (rc)
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goto peer_bus_exit;
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rc = misc_register(mdev);
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if (rc)
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goto unreg_scif;
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scif_init_debugfs();
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return 0;
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unreg_scif:
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scif_unregister_driver(&scif_driver);
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peer_bus_exit:
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scif_peer_bus_exit();
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exit:
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_scif_exit();
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return rc;
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}
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static void __exit scif_exit(void)
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{
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scif_exit_debugfs();
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misc_deregister(&scif_info.mdev);
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scif_unregister_driver(&scif_driver);
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scif_peer_bus_exit();
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iova_cache_put();
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_scif_exit();
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}
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module_init(scif_init);
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module_exit(scif_exit);
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MODULE_DEVICE_TABLE(scif, id_table);
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MODULE_AUTHOR("Intel Corporation");
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MODULE_DESCRIPTION("Intel(R) SCIF driver");
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MODULE_LICENSE("GPL v2");
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