575 lines
17 KiB
C
575 lines
17 KiB
C
/*
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* This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
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* driver for Linux.
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*
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* Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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/*
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* This file should not be included directly. Include t4vf_common.h instead.
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*/
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#ifndef __CXGB4VF_ADAPTER_H__
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#define __CXGB4VF_ADAPTER_H__
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/spinlock.h>
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#include <linux/skbuff.h>
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#include <linux/if_ether.h>
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#include <linux/netdevice.h>
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#include "../cxgb4/t4_hw.h"
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/*
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* Constants of the implementation.
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*/
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enum {
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MAX_NPORTS = 1, /* max # of "ports" */
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MAX_PORT_QSETS = 8, /* max # of Queue Sets / "port" */
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MAX_ETH_QSETS = MAX_NPORTS*MAX_PORT_QSETS,
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/*
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* MSI-X interrupt index usage.
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*/
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MSIX_FW = 0, /* MSI-X index for firmware Q */
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MSIX_IQFLINT = 1, /* MSI-X index base for Ingress Qs */
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MSIX_EXTRAS = 1,
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MSIX_ENTRIES = MAX_ETH_QSETS + MSIX_EXTRAS,
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/*
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* The maximum number of Ingress and Egress Queues is determined by
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* the maximum number of "Queue Sets" which we support plus any
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* ancillary queues. Each "Queue Set" requires one Ingress Queue
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* for RX Packet Ingress Event notifications and two Egress Queues for
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* a Free List and an Ethernet TX list.
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*/
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INGQ_EXTRAS = 2, /* firmware event queue and */
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/* forwarded interrupts */
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MAX_INGQ = MAX_ETH_QSETS+INGQ_EXTRAS,
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MAX_EGRQ = MAX_ETH_QSETS*2,
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};
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/*
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* Forward structure definition references.
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*/
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struct adapter;
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struct sge_eth_rxq;
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struct sge_rspq;
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/*
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* Per-"port" information. This is really per-Virtual Interface information
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* but the use of the "port" nomanclature makes it easier to go back and forth
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* between the PF and VF drivers ...
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*/
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struct port_info {
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struct adapter *adapter; /* our adapter */
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u32 vlan_id; /* vlan id for VST */
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u16 viid; /* virtual interface ID */
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s16 xact_addr_filt; /* index of our MAC address filter */
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u16 rss_size; /* size of VI's RSS table slice */
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u8 pidx; /* index into adapter port[] */
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s8 mdio_addr;
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u8 port_type; /* firmware port type */
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u8 mod_type; /* firmware module type */
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u8 port_id; /* physical port ID */
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u8 nqsets; /* # of "Queue Sets" */
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u8 first_qset; /* index of first "Queue Set" */
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struct link_config link_cfg; /* physical port configuration */
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};
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/*
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* Scatter Gather Engine resources for the "adapter". Our ingress and egress
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* queues are organized into "Queue Sets" with one ingress and one egress
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* queue per Queue Set. These Queue Sets are aportionable between the "ports"
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* (Virtual Interfaces). One extra ingress queue is used to receive
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* asynchronous messages from the firmware. Note that the "Queue IDs" that we
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* use here are really "Relative Queue IDs" which are returned as part of the
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* firmware command to allocate queues. These queue IDs are relative to the
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* absolute Queue ID base of the section of the Queue ID space allocated to
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* the PF/VF.
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*/
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/*
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* SGE free-list queue state.
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*/
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struct rx_sw_desc;
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struct sge_fl {
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unsigned int avail; /* # of available RX buffers */
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unsigned int pend_cred; /* new buffers since last FL DB ring */
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unsigned int cidx; /* consumer index */
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unsigned int pidx; /* producer index */
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unsigned long alloc_failed; /* # of buffer allocation failures */
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unsigned long large_alloc_failed;
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unsigned long starving; /* # of times FL was found starving */
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/*
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* Write-once/infrequently fields.
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* -------------------------------
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*/
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unsigned int cntxt_id; /* SGE relative QID for the free list */
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unsigned int abs_id; /* SGE absolute QID for the free list */
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unsigned int size; /* capacity of free list */
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struct rx_sw_desc *sdesc; /* address of SW RX descriptor ring */
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__be64 *desc; /* address of HW RX descriptor ring */
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dma_addr_t addr; /* PCI bus address of hardware ring */
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void __iomem *bar2_addr; /* address of BAR2 Queue registers */
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unsigned int bar2_qid; /* Queue ID for BAR2 Queue registers */
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};
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/*
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* An ingress packet gather list.
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*/
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struct pkt_gl {
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struct page_frag frags[MAX_SKB_FRAGS];
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void *va; /* virtual address of first byte */
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unsigned int nfrags; /* # of fragments */
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unsigned int tot_len; /* total length of fragments */
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};
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typedef int (*rspq_handler_t)(struct sge_rspq *, const __be64 *,
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const struct pkt_gl *);
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/*
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* State for an SGE Response Queue.
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*/
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struct sge_rspq {
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struct napi_struct napi; /* NAPI scheduling control */
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const __be64 *cur_desc; /* current descriptor in queue */
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unsigned int cidx; /* consumer index */
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u8 gen; /* current generation bit */
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u8 next_intr_params; /* holdoff params for next interrupt */
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int offset; /* offset into current FL buffer */
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unsigned int unhandled_irqs; /* bogus interrupts */
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/*
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* Write-once/infrequently fields.
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* -------------------------------
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*/
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u8 intr_params; /* interrupt holdoff parameters */
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u8 pktcnt_idx; /* interrupt packet threshold */
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u8 idx; /* queue index within its group */
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u16 cntxt_id; /* SGE rel QID for the response Q */
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u16 abs_id; /* SGE abs QID for the response Q */
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__be64 *desc; /* address of hardware response ring */
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dma_addr_t phys_addr; /* PCI bus address of ring */
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void __iomem *bar2_addr; /* address of BAR2 Queue registers */
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unsigned int bar2_qid; /* Queue ID for BAR2 Queue registers */
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unsigned int iqe_len; /* entry size */
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unsigned int size; /* capcity of response Q */
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struct adapter *adapter; /* our adapter */
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struct net_device *netdev; /* associated net device */
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rspq_handler_t handler; /* the handler for this response Q */
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};
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/*
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* Ethernet queue statistics
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*/
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struct sge_eth_stats {
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unsigned long pkts; /* # of ethernet packets */
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unsigned long lro_pkts; /* # of LRO super packets */
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unsigned long lro_merged; /* # of wire packets merged by LRO */
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unsigned long rx_cso; /* # of Rx checksum offloads */
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unsigned long vlan_ex; /* # of Rx VLAN extractions */
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unsigned long rx_drops; /* # of packets dropped due to no mem */
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};
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/*
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* State for an Ethernet Receive Queue.
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*/
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struct sge_eth_rxq {
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struct sge_rspq rspq; /* Response Queue */
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struct sge_fl fl; /* Free List */
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struct sge_eth_stats stats; /* receive statistics */
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};
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/*
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* SGE Transmit Queue state. This contains all of the resources associated
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* with the hardware status of a TX Queue which is a circular ring of hardware
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* TX Descriptors. For convenience, it also contains a pointer to a parallel
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* "Software Descriptor" array but we don't know anything about it here other
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* than its type name.
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*/
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struct tx_desc {
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/*
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* Egress Queues are measured in units of SGE_EQ_IDXSIZE by the
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* hardware: Sizes, Producer and Consumer indices, etc.
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*/
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__be64 flit[SGE_EQ_IDXSIZE/sizeof(__be64)];
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};
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struct tx_sw_desc;
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struct sge_txq {
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unsigned int in_use; /* # of in-use TX descriptors */
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unsigned int size; /* # of descriptors */
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unsigned int cidx; /* SW consumer index */
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unsigned int pidx; /* producer index */
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unsigned long stops; /* # of times queue has been stopped */
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unsigned long restarts; /* # of queue restarts */
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/*
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* Write-once/infrequently fields.
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* -------------------------------
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*/
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unsigned int cntxt_id; /* SGE relative QID for the TX Q */
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unsigned int abs_id; /* SGE absolute QID for the TX Q */
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struct tx_desc *desc; /* address of HW TX descriptor ring */
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struct tx_sw_desc *sdesc; /* address of SW TX descriptor ring */
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struct sge_qstat *stat; /* queue status entry */
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dma_addr_t phys_addr; /* PCI bus address of hardware ring */
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void __iomem *bar2_addr; /* address of BAR2 Queue registers */
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unsigned int bar2_qid; /* Queue ID for BAR2 Queue registers */
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};
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/*
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* State for an Ethernet Transmit Queue.
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*/
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struct sge_eth_txq {
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struct sge_txq q; /* SGE TX Queue */
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struct netdev_queue *txq; /* associated netdev TX queue */
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unsigned long tso; /* # of TSO requests */
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unsigned long tx_cso; /* # of TX checksum offloads */
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unsigned long vlan_ins; /* # of TX VLAN insertions */
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unsigned long mapping_err; /* # of I/O MMU packet mapping errors */
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};
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/*
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* The complete set of Scatter/Gather Engine resources.
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*/
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struct sge {
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/*
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* Our "Queue Sets" ...
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*/
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struct sge_eth_txq ethtxq[MAX_ETH_QSETS];
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struct sge_eth_rxq ethrxq[MAX_ETH_QSETS];
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/*
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* Extra ingress queues for asynchronous firmware events and
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* forwarded interrupts (when in MSI mode).
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*/
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struct sge_rspq fw_evtq ____cacheline_aligned_in_smp;
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struct sge_rspq intrq ____cacheline_aligned_in_smp;
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spinlock_t intrq_lock;
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/*
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* State for managing "starving Free Lists" -- Free Lists which have
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* fallen below a certain threshold of buffers available to the
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* hardware and attempts to refill them up to that threshold have
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* failed. We have a regular "slow tick" timer process which will
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* make periodic attempts to refill these starving Free Lists ...
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*/
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DECLARE_BITMAP(starving_fl, MAX_EGRQ);
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struct timer_list rx_timer;
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/*
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* State for cleaning up completed TX descriptors.
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*/
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struct timer_list tx_timer;
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/*
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* Write-once/infrequently fields.
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* -------------------------------
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*/
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u16 max_ethqsets; /* # of available Ethernet queue sets */
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u16 ethqsets; /* # of active Ethernet queue sets */
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u16 ethtxq_rover; /* Tx queue to clean up next */
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u16 timer_val[SGE_NTIMERS]; /* interrupt holdoff timer array */
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u8 counter_val[SGE_NCOUNTERS]; /* interrupt RX threshold array */
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/* Decoded Adapter Parameters.
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*/
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u32 fl_pg_order; /* large page allocation size */
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u32 stat_len; /* length of status page at ring end */
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u32 pktshift; /* padding between CPL & packet data */
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u32 fl_align; /* response queue message alignment */
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u32 fl_starve_thres; /* Free List starvation threshold */
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/*
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* Reverse maps from Absolute Queue IDs to associated queue pointers.
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* The absolute Queue IDs are in a compact range which start at a
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* [potentially large] Base Queue ID. We perform the reverse map by
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* first converting the Absolute Queue ID into a Relative Queue ID by
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* subtracting off the Base Queue ID and then use a Relative Queue ID
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* indexed table to get the pointer to the corresponding software
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* queue structure.
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*/
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unsigned int egr_base;
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unsigned int ingr_base;
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void *egr_map[MAX_EGRQ];
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struct sge_rspq *ingr_map[MAX_INGQ];
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};
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/*
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* Utility macros to convert Absolute- to Relative-Queue indices and Egress-
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* and Ingress-Queues. The EQ_MAP() and IQ_MAP() macros which provide
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* pointers to Ingress- and Egress-Queues can be used as both L- and R-values
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*/
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#define EQ_IDX(s, abs_id) ((unsigned int)((abs_id) - (s)->egr_base))
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#define IQ_IDX(s, abs_id) ((unsigned int)((abs_id) - (s)->ingr_base))
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#define EQ_MAP(s, abs_id) ((s)->egr_map[EQ_IDX(s, abs_id)])
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#define IQ_MAP(s, abs_id) ((s)->ingr_map[IQ_IDX(s, abs_id)])
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/*
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* Macro to iterate across Queue Sets ("rxq" is a historic misnomer).
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*/
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#define for_each_ethrxq(sge, iter) \
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for (iter = 0; iter < (sge)->ethqsets; iter++)
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struct hash_mac_addr {
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struct list_head list;
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u8 addr[ETH_ALEN];
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};
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struct mbox_list {
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struct list_head list;
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};
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/*
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* Per-"adapter" (Virtual Function) information.
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*/
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struct adapter {
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/* PCI resources */
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void __iomem *regs;
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void __iomem *bar2;
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struct pci_dev *pdev;
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struct device *pdev_dev;
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/* "adapter" resources */
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unsigned long registered_device_map;
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unsigned long open_device_map;
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unsigned long flags;
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struct adapter_params params;
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/* queue and interrupt resources */
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struct {
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unsigned short vec;
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char desc[22];
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} msix_info[MSIX_ENTRIES];
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struct sge sge;
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/* Linux network device resources */
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struct net_device *port[MAX_NPORTS];
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const char *name;
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unsigned int msg_enable;
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/* debugfs resources */
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struct dentry *debugfs_root;
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/* various locks */
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spinlock_t stats_lock;
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/* lock for mailbox cmd list */
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spinlock_t mbox_lock;
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struct mbox_list mlist;
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/* support for mailbox command/reply logging */
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#define T4VF_OS_LOG_MBOX_CMDS 256
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struct mbox_cmd_log *mbox_log;
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/* list of MAC addresses in MPS Hash */
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struct list_head mac_hlist;
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};
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enum { /* adapter flags */
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FULL_INIT_DONE = (1UL << 0),
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USING_MSI = (1UL << 1),
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USING_MSIX = (1UL << 2),
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QUEUES_BOUND = (1UL << 3),
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ROOT_NO_RELAXED_ORDERING = (1UL << 4),
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};
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/*
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* The following register read/write routine definitions are required by
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* the common code.
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*/
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/**
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* t4_read_reg - read a HW register
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* @adapter: the adapter
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* @reg_addr: the register address
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*
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* Returns the 32-bit value of the given HW register.
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*/
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static inline u32 t4_read_reg(struct adapter *adapter, u32 reg_addr)
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{
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return readl(adapter->regs + reg_addr);
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}
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/**
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* t4_write_reg - write a HW register
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* @adapter: the adapter
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* @reg_addr: the register address
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* @val: the value to write
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*
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* Write a 32-bit value into the given HW register.
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*/
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static inline void t4_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
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{
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writel(val, adapter->regs + reg_addr);
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}
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#ifndef readq
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static inline u64 readq(const volatile void __iomem *addr)
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{
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return readl(addr) + ((u64)readl(addr + 4) << 32);
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}
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static inline void writeq(u64 val, volatile void __iomem *addr)
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{
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writel(val, addr);
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writel(val >> 32, addr + 4);
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}
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#endif
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/**
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* t4_read_reg64 - read a 64-bit HW register
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* @adapter: the adapter
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* @reg_addr: the register address
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*
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* Returns the 64-bit value of the given HW register.
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*/
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static inline u64 t4_read_reg64(struct adapter *adapter, u32 reg_addr)
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{
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return readq(adapter->regs + reg_addr);
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}
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/**
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* t4_write_reg64 - write a 64-bit HW register
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* @adapter: the adapter
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* @reg_addr: the register address
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* @val: the value to write
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*
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* Write a 64-bit value into the given HW register.
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*/
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static inline void t4_write_reg64(struct adapter *adapter, u32 reg_addr,
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u64 val)
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{
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writeq(val, adapter->regs + reg_addr);
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}
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/**
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* port_name - return the string name of a port
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* @adapter: the adapter
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* @pidx: the port index
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*
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* Return the string name of the selected port.
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*/
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static inline const char *port_name(struct adapter *adapter, int pidx)
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{
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return adapter->port[pidx]->name;
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}
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/**
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* t4_os_set_hw_addr - store a port's MAC address in SW
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* @adapter: the adapter
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* @pidx: the port index
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* @hw_addr: the Ethernet address
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*
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* Store the Ethernet address of the given port in SW. Called by the common
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* code when it retrieves a port's Ethernet address from EEPROM.
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*/
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static inline void t4_os_set_hw_addr(struct adapter *adapter, int pidx,
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u8 hw_addr[])
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{
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memcpy(adapter->port[pidx]->dev_addr, hw_addr, ETH_ALEN);
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}
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/**
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* netdev2pinfo - return the port_info structure associated with a net_device
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* @dev: the netdev
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*
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* Return the struct port_info associated with a net_device
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*/
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static inline struct port_info *netdev2pinfo(const struct net_device *dev)
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|
{
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return netdev_priv(dev);
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}
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|
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/**
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* adap2pinfo - return the port_info of a port
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* @adap: the adapter
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* @pidx: the port index
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*
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|
* Return the port_info structure for the adapter.
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*/
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static inline struct port_info *adap2pinfo(struct adapter *adapter, int pidx)
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|
{
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return netdev_priv(adapter->port[pidx]);
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}
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|
|
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/**
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|
* netdev2adap - return the adapter structure associated with a net_device
|
|
* @dev: the netdev
|
|
*
|
|
* Return the struct adapter associated with a net_device
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|
*/
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static inline struct adapter *netdev2adap(const struct net_device *dev)
|
|
{
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return netdev2pinfo(dev)->adapter;
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|
}
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|
|
|
/*
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|
* OS "Callback" function declarations. These are functions that the OS code
|
|
* is "contracted" to provide for the common code.
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|
*/
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|
void t4vf_os_link_changed(struct adapter *, int, int);
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void t4vf_os_portmod_changed(struct adapter *, int);
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|
|
|
/*
|
|
* SGE function prototype declarations.
|
|
*/
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|
int t4vf_sge_alloc_rxq(struct adapter *, struct sge_rspq *, bool,
|
|
struct net_device *, int,
|
|
struct sge_fl *, rspq_handler_t);
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|
int t4vf_sge_alloc_eth_txq(struct adapter *, struct sge_eth_txq *,
|
|
struct net_device *, struct netdev_queue *,
|
|
unsigned int);
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|
void t4vf_free_sge_resources(struct adapter *);
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|
|
|
int t4vf_eth_xmit(struct sk_buff *, struct net_device *);
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|
int t4vf_ethrx_handler(struct sge_rspq *, const __be64 *,
|
|
const struct pkt_gl *);
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|
|
|
irq_handler_t t4vf_intr_handler(struct adapter *);
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|
irqreturn_t t4vf_sge_intr_msix(int, void *);
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|
|
|
int t4vf_sge_init(struct adapter *);
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|
void t4vf_sge_start(struct adapter *);
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|
void t4vf_sge_stop(struct adapter *);
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|
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|
#endif /* __CXGB4VF_ADAPTER_H__ */
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