147 lines
3.6 KiB
C
147 lines
3.6 KiB
C
/*
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* Copyright (C) 2016 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __MT76x2_DFS_H
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#define __MT76x2_DFS_H
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#include <linux/types.h>
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#include <linux/nl80211.h>
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#define MT_DFS_GP_INTERVAL (10 << 4) /* 64 us unit */
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#define MT_DFS_NUM_ENGINES 4
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/* bbp params */
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#define MT_DFS_SYM_ROUND 0
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#define MT_DFS_DELTA_DELAY 2
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#define MT_DFS_VGA_MASK 0
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#define MT_DFS_PWR_GAIN_OFFSET 3
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#define MT_DFS_PWR_DOWN_TIME 0xf
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#define MT_DFS_RX_PE_MASK 0xff
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#define MT_DFS_PKT_END_MASK 0
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#define MT_DFS_CH_EN 0xf
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/* sw detector params */
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#define MT_DFS_EVENT_LOOP 64
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#define MT_DFS_SW_TIMEOUT (HZ / 20)
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#define MT_DFS_EVENT_WINDOW (HZ / 5)
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#define MT_DFS_SEQUENCE_WINDOW (200 * (1 << 20))
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#define MT_DFS_EVENT_TIME_MARGIN 2000
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#define MT_DFS_PRI_MARGIN 4
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#define MT_DFS_SEQUENCE_TH 6
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#define MT_DFS_FCC_MAX_PRI ((28570 << 1) + 1000)
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#define MT_DFS_FCC_MIN_PRI (3000 - 2)
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#define MT_DFS_JP_MAX_PRI ((80000 << 1) + 1000)
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#define MT_DFS_JP_MIN_PRI (28500 - 2)
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#define MT_DFS_ETSI_MAX_PRI (133333 + 125000 + 117647 + 1000)
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#define MT_DFS_ETSI_MIN_PRI (4500 - 20)
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struct mt76x2_radar_specs {
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u8 mode;
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u16 avg_len;
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u16 e_low;
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u16 e_high;
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u16 w_low;
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u16 w_high;
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u16 w_margin;
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u32 t_low;
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u32 t_high;
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u16 t_margin;
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u32 b_low;
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u32 b_high;
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u32 event_expiration;
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u16 pwr_jmp;
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};
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#define MT_DFS_CHECK_EVENT(x) ((x) != GENMASK(31, 0))
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#define MT_DFS_EVENT_ENGINE(x) (((x) & BIT(31)) ? 2 : 0)
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#define MT_DFS_EVENT_TIMESTAMP(x) ((x) & GENMASK(21, 0))
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#define MT_DFS_EVENT_WIDTH(x) ((x) & GENMASK(11, 0))
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struct mt76x2_dfs_event {
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unsigned long fetch_ts;
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u32 ts;
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u16 width;
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u8 engine;
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};
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#define MT_DFS_EVENT_BUFLEN 256
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struct mt76x2_dfs_event_rb {
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struct mt76x2_dfs_event data[MT_DFS_EVENT_BUFLEN];
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int h_rb, t_rb;
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};
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struct mt76x2_dfs_sequence {
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struct list_head head;
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u32 first_ts;
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u32 last_ts;
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u32 pri;
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u16 count;
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u8 engine;
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};
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struct mt76x2_dfs_hw_pulse {
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u8 engine;
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u32 period;
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u32 w1;
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u32 w2;
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u32 burst;
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};
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struct mt76x2_dfs_sw_detector_params {
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u32 min_pri;
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u32 max_pri;
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u32 pri_margin;
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};
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struct mt76x2_dfs_engine_stats {
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u32 hw_pattern;
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u32 hw_pulse_discarded;
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u32 sw_pattern;
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};
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struct mt76x2_dfs_seq_stats {
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u32 seq_pool_len;
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u32 seq_len;
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};
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struct mt76x2_dfs_pattern_detector {
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enum nl80211_dfs_regions region;
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u8 chirp_pulse_cnt;
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u32 chirp_pulse_ts;
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struct mt76x2_dfs_sw_detector_params sw_dpd_params;
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struct mt76x2_dfs_event_rb event_rb[2];
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struct list_head sequences;
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struct list_head seq_pool;
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struct mt76x2_dfs_seq_stats seq_stats;
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unsigned long last_sw_check;
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u32 last_event_ts;
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struct mt76x2_dfs_engine_stats stats[MT_DFS_NUM_ENGINES];
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struct tasklet_struct dfs_tasklet;
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};
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void mt76x2_dfs_init_params(struct mt76x2_dev *dev);
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void mt76x2_dfs_init_detector(struct mt76x2_dev *dev);
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void mt76x2_dfs_adjust_agc(struct mt76x2_dev *dev);
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void mt76x2_dfs_set_domain(struct mt76x2_dev *dev,
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enum nl80211_dfs_regions region);
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#endif /* __MT76x2_DFS_H */
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