65 lines
1.9 KiB
Plaintext
Executable file
65 lines
1.9 KiB
Plaintext
Executable file
Clock bindings for ST-Ericsson Ux500 clocks
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Required properties :
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- compatible : shall contain only one of the following:
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"stericsson,u8500-clks"
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"stericsson,u8540-clks"
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"stericsson,u9540-clks"
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- reg : shall contain base register location and length for
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CLKRST1, 2, 3, 5, and 6 in an array. Note the absence of
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CLKRST4, which does not exist.
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Required subnodes:
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- prcmu-clock: a subnode with one clock cell for PRCMU (power,
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reset, control unit) clocks. The cell indicates which PRCMU
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clock in the prcmu-clock node the consumer wants to use.
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- prcc-periph-clock: a subnode with two clock cells for
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PRCC (programmable reset- and clock controller) peripheral clocks.
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The first cell indicates which PRCC block the consumer
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wants to use, possible values are 1, 2, 3, 5, 6. The second
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cell indicates which clock inside the PRCC block it wants,
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possible values are 0 thru 31.
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- prcc-kernel-clock: a subnode with two clock cells for
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PRCC (programmable reset- and clock controller) kernel clocks
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The first cell indicates which PRCC block the consumer
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wants to use, possible values are 1, 2, 3, 5, 6. The second
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cell indicates which clock inside the PRCC block it wants,
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possible values are 0 thru 31.
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- rtc32k-clock: a subnode with zero clock cells for the 32kHz
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RTC clock.
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- smp-twd-clock: a subnode for the ARM SMP Timer Watchdog cluster
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with zero clock cells.
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Example:
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clocks {
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compatible = "stericsson,u8500-clks";
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/*
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* Registers for the CLKRST block on peripheral
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* groups 1, 2, 3, 5, 6,
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*/
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reg = <0x8012f000 0x1000>, <0x8011f000 0x1000>,
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<0x8000f000 0x1000>, <0xa03ff000 0x1000>,
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<0xa03cf000 0x1000>;
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prcmu_clk: prcmu-clock {
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#clock-cells = <1>;
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};
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prcc_pclk: prcc-periph-clock {
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#clock-cells = <2>;
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};
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prcc_kclk: prcc-kernel-clock {
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#clock-cells = <2>;
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};
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rtc_clk: rtc32k-clock {
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#clock-cells = <0>;
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};
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smp_twd_clk: smp-twd-clock {
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#clock-cells = <0>;
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};
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};
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