42 lines
1.2 KiB
Plaintext
Executable file
42 lines
1.2 KiB
Plaintext
Executable file
* Clock bindings for Freescale Vybrid VF610 SOC
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Required properties:
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- compatible: Should be "fsl,vf610-ccm"
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- reg: Address and length of the register set
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- #clock-cells: Should be <1>
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Optional properties:
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- clocks: list of clock identifiers which are external input clocks to the
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given clock controller. Please refer the next section to find
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the input clocks for a given controller.
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- clock-names: list of names of clocks which are exteral input clocks to the
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given clock controller.
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Input clocks for top clock controller:
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- sxosc (external crystal oscillator 32KHz, recommended)
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- fxosc (external crystal oscillator 24MHz, recommended)
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- audio_ext
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- enet_ext
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The clock consumer should specify the desired clock by having the clock
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ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h
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for the full list of VF610 clock IDs.
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Examples:
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clks: ccm@4006b000 {
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compatible = "fsl,vf610-ccm";
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reg = <0x4006b000 0x1000>;
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#clock-cells = <1>;
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clocks = <&sxosc>, <&fxosc>;
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clock-names = "sxosc", "fxosc";
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};
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uart1: serial@40028000 {
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compatible = "fsl,vf610-uart";
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reg = <0x40028000 0x1000>;
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interrupts = <0 62 0x04>;
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clocks = <&clks VF610_CLK_UART1>;
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clock-names = "ipg";
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};
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