66 lines
2 KiB
Plaintext
Executable file
66 lines
2 KiB
Plaintext
Executable file
Freescale i.MX6 DWC HDMI TX Encoder
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===================================
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The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
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with a companion PHY IP.
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These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
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Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
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following device-specific properties.
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Required properties:
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- compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi".
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- reg: See dw_hdmi.txt.
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- interrupts: HDMI interrupt number
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- clocks: See dw_hdmi.txt.
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- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
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- ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports,
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numbered 0 to 3, corresponding to the four inputs of the HDMI multiplexer.
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Each port shall have a single endpoint.
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- gpr : Shall contain a phandle to the iomuxc-gpr region containing the HDMI
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multiplexer control register.
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Optional properties
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- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
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or the functionally-reduced I2C master contained in the DWC HDMI. When
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connected to a system I2C master this property contains a phandle to that
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I2C master controller.
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Example:
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gpr: iomuxc-gpr@20e0000 {
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/* ... */
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};
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hdmi: hdmi@120000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx6q-hdmi";
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reg = <0x00120000 0x9000>;
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interrupts = <0 115 0x04>;
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gpr = <&gpr>;
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clocks = <&clks 123>, <&clks 124>;
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clock-names = "iahb", "isfr";
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ddc-i2c-bus = <&i2c2>;
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port@0 {
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reg = <0>;
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hdmi_mux_0: endpoint {
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remote-endpoint = <&ipu1_di0_hdmi>;
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};
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};
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port@1 {
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reg = <1>;
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hdmi_mux_1: endpoint {
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remote-endpoint = <&ipu1_di1_hdmi>;
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};
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};
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};
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