98 lines
3.3 KiB
Plaintext
Executable file
98 lines
3.3 KiB
Plaintext
Executable file
Spreadtrum EIC controller bindings
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The EIC is the abbreviation of external interrupt controller, which can
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be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
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one is in digital chip, and another one is in PMIC. The digital chip EIC
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controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and
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EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
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module.
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The EIC-debounce sub-module provides up to 8 source input signal
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connections. A debounce mechanism is used to capture the input signals'
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stable status (millisecond resolution) and a single-trigger mechanism
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is introduced into this sub-module to enhance the input event detection
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reliability. In addition, this sub-module's clock can be shut off
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automatically to reduce power dissipation. Moreover the debounce range
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is from 1ms to 4s with a step size of 1ms. The input signal will be
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ignored if it is asserted for less than 1 ms.
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The EIC-latch sub-module is used to latch some special power down signals
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and generate interrupts, since the EIC-latch does not depend on the APB
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clock to capture signals.
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The EIC-async sub-module uses a 32kHz clock to capture the short signals
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(microsecond resolution) to generate interrupts by level or edge trigger.
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The EIC-sync is similar with GPIO's input function, which is a synchronized
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signal input register. It can generate interrupts by level or edge trigger
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when detecting input signals.
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Required properties:
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- compatible: Should be one of the following:
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"sprd,sc9860-eic-debounce",
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"sprd,sc9860-eic-latch",
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"sprd,sc9860-eic-async",
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"sprd,sc9860-eic-sync",
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"sprd,sc27xx-eic".
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- reg: Define the base and range of the I/O address space containing
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the GPIO controller registers.
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- gpio-controller: Marks the device node as a GPIO controller.
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- #gpio-cells: Should be <2>. The first cell is the gpio number and
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the second cell is used to specify optional parameters.
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- interrupt-controller: Marks the device node as an interrupt controller.
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- #interrupt-cells: Should be <2>. Specifies the number of cells needed
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to encode interrupt source.
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- interrupts: Should be the port interrupt shared by all the gpios.
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Example:
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eic_debounce: gpio@40210000 {
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compatible = "sprd,sc9860-eic-debounce";
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reg = <0 0x40210000 0 0x80>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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};
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eic_latch: gpio@40210080 {
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compatible = "sprd,sc9860-eic-latch";
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reg = <0 0x40210080 0 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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};
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eic_async: gpio@402100a0 {
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compatible = "sprd,sc9860-eic-async";
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reg = <0 0x402100a0 0 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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};
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eic_sync: gpio@402100c0 {
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compatible = "sprd,sc9860-eic-sync";
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reg = <0 0x402100c0 0 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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};
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pmic_eic: gpio@300 {
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compatible = "sprd,sc27xx-eic";
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reg = <0x300>;
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interrupt-parent = <&sc2731_pmic>;
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interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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