83 lines
2.4 KiB
Plaintext
Executable file
83 lines
2.4 KiB
Plaintext
Executable file
* Meta External Trigger Controller Binding
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This binding specifies what properties must be available in the device tree
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representation of a Meta external trigger controller.
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Required properties:
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- compatible: Specifies the compatibility list for the interrupt controller.
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The type shall be <string> and the value shall include "img,meta-intc".
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- num-banks: Specifies the number of interrupt banks (each of which can
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handle 32 interrupt sources).
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- interrupt-controller: The presence of this property identifies the node
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as an interrupt controller. No property value shall be defined.
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- #interrupt-cells: Specifies the number of cells needed to encode an
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interrupt source. The type shall be a <u32> and the value shall be 2.
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- #address-cells: Specifies the number of cells needed to encode an
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address. The type shall be <u32> and the value shall be 0. As such,
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'interrupt-map' nodes do not have to specify a parent unit address.
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Optional properties:
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- no-mask: The controller doesn't have any mask registers.
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* Interrupt Specifier Definition
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Interrupt specifiers consists of 2 cells encoded as follows:
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- <1st-cell>: The interrupt-number that identifies the interrupt source.
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- <2nd-cell>: The Linux interrupt flags containing level-sense information,
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encoded as follows:
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1 = edge triggered
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4 = level-sensitive
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* Examples
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Example 1:
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/*
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* Meta external trigger block
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*/
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intc: intc {
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// This is an interrupt controller node.
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interrupt-controller;
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// No address cells so that 'interrupt-map' nodes which
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// reference this interrupt controller node do not need a parent
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// address specifier.
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#address-cells = <0>;
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// Two cells to encode interrupt sources.
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#interrupt-cells = <2>;
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// Number of interrupt banks
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num-banks = <2>;
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// No HWMASKEXT is available (specify on Chorus2 and Comet ES1)
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no-mask;
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// Compatible with Meta hardware trigger block.
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compatible = "img,meta-intc";
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};
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Example 2:
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/*
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* An interrupt generating device that is wired to a Meta external
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* trigger block.
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*/
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uart1: uart@02004c00 {
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// Interrupt source '5' that is level-sensitive.
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// Note that there are only two cells as specified in the
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// interrupt parent's '#interrupt-cells' property.
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interrupts = <5 4 /* level */>;
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// The interrupt controller that this device is wired to.
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interrupt-parent = <&intc>;
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};
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