59 lines
1.8 KiB
Plaintext
Executable file
59 lines
1.8 KiB
Plaintext
Executable file
Samsung S5K5BAF UXGA 1/5" 2M CMOS Image Sensor with embedded SoC ISP
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--------------------------------------------------------------------
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Required properties:
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- compatible : "samsung,s5k5baf";
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- reg : I2C slave address of the sensor;
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- vdda-supply : analog power supply 2.8V (2.6V to 3.0V);
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- vddreg-supply : regulator input power supply 1.8V (1.7V to 1.9V)
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or 2.8V (2.6V to 3.0);
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- vddio-supply : I/O power supply 1.8V (1.65V to 1.95V)
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or 2.8V (2.5V to 3.1V);
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- stbyn-gpios : GPIO connected to STDBYN pin;
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- rstn-gpios : GPIO connected to RSTN pin;
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- clocks : list of phandle and clock specifier pairs
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according to common clock bindings for the
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clocks described in clock-names;
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- clock-names : should include "mclk" for the sensor's master clock;
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Optional properties:
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- clock-frequency : the frequency at which the "mclk" clock should be
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configured to operate, in Hz; if this property is not
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specified default 24 MHz value will be used.
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The device node should contain one 'port' child node with one child 'endpoint'
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node, according to the bindings defined in Documentation/devicetree/bindings/
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media/video-interfaces.txt. The following are properties specific to those
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nodes.
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endpoint node
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-------------
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- data-lanes : (optional) specifies MIPI CSI-2 data lanes as covered in
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video-interfaces.txt. If present it should be <1> - the device
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supports only one data lane without re-mapping.
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Example:
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s5k5bafx@2d {
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compatible = "samsung,s5k5baf";
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reg = <0x2d>;
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vdda-supply = <&cam_io_en_reg>;
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vddreg-supply = <&vt_core_15v_reg>;
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vddio-supply = <&vtcam_reg>;
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stbyn-gpios = <&gpl2 0 1>;
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rstn-gpios = <&gpl2 1 1>;
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clock-names = "mclk";
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clocks = <&clock_cam 0>;
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clock-frequency = <24000000>;
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port {
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s5k5bafx_ep: endpoint {
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remote-endpoint = <&csis1_ep>;
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data-lanes = <1>;
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};
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};
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};
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