44 lines
1.1 KiB
Plaintext
Executable file
44 lines
1.1 KiB
Plaintext
Executable file
* Microsemi MIPS CPUs
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Boards with a SoC of the Microsemi MIPS family shall have the following
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properties:
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Required properties:
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- compatible: "mscc,ocelot"
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* Other peripherals:
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o CPU chip regs:
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The SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous
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functionalities: chip ID, general purpose register for software use, reset
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controller, hardware status and configuration, efuses.
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Required properties:
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- compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
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- reg : Should contain registers location and length
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Example:
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syscon@71070000 {
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compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
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reg = <0x71070000 0x1c>;
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};
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o CPU system control:
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The SoC has a few registers (ICPU_CFG:CPU_SYSTEM_CTRL) handling configuration of
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the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU
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endianness, CPU bus control, CPU status.
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Required properties:
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- compatible: Should be "mscc,ocelot-cpu-syscon", "syscon"
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- reg : Should contain registers location and length
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Example:
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syscon@70000000 {
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compatible = "mscc,ocelot-cpu-syscon", "syscon";
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reg = <0x70000000 0x2c>;
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};
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