113 lines
4.4 KiB
Plaintext
Executable file
113 lines
4.4 KiB
Plaintext
Executable file
* Toshiba Mobile IO SD/MMC controller
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The tmio-mmc driver doesn't probe its devices actively, instead its binding to
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devices is managed by either MFD drivers or by the sh_mobile_sdhi platform
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driver. Those drivers supply the tmio-mmc driver with platform data, that either
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describe hardware capabilities, known to them, or are obtained by them from
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their own platform data or from their DT information. In the latter case all
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compulsory and any optional properties, common to all SD/MMC drivers, as
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described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
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optional bindings can be used.
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Required properties:
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- compatible: should contain one or more of the following:
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"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
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"renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
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"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
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"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
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"renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
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"renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
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"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
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"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
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"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
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"renesas,sdhi-r8a7791" - SDHI IP on R8A7791 SoC
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"renesas,sdhi-r8a7792" - SDHI IP on R8A7792 SoC
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"renesas,sdhi-r8a7793" - SDHI IP on R8A7793 SoC
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"renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
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"renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
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"renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC
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"renesas,sdhi-r8a77965" - SDHI IP on R8A77965 SoC
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"renesas,sdhi-r8a77980" - SDHI IP on R8A77980 SoC
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"renesas,sdhi-r8a77990" - SDHI IP on R8A77990 SoC
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"renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
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"renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
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"renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
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"renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G1
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SDHI controller
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"renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 SDHI controller
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When compatible with the generic version, nodes must list
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the SoC-specific version corresponding to the platform
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first followed by the generic version.
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- clocks: Most controllers only have 1 clock source per channel. However, on
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some variations of this controller, the internal card detection
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logic that exists in this controller is sectioned off to be run by a
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separate second clock source to allow the main core clock to be turned
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off to save power.
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If 2 clocks are specified by the hardware, you must name them as
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"core" and "cd". If the controller only has 1 clock, naming is not
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required.
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Devices which have more than 1 clock are listed below:
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2: R7S72100
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Optional properties:
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- pinctrl-names: should be "default", "state_uhs"
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- pinctrl-0: should contain default/high speed pin ctrl
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- pinctrl-1: should contain uhs mode pin ctrl
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Example: R8A7790 (R-Car H2) SDHI controller nodes
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sdhi0: sd@ee100000 {
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compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
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reg = <0 0xee100000 0 0x328>;
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interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 314>;
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dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
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<&dmac1 0xcd>, <&dmac1 0xce>;
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dma-names = "tx", "rx", "tx", "rx";
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max-frequency = <195000000>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 314>;
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};
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sdhi1: sd@ee120000 {
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compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
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reg = <0 0xee120000 0 0x328>;
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interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 313>;
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dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
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<&dmac1 0xc9>, <&dmac1 0xca>;
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dma-names = "tx", "rx", "tx", "rx";
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max-frequency = <195000000>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 313>;
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};
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sdhi2: sd@ee140000 {
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compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
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reg = <0 0xee140000 0 0x100>;
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interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 312>;
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dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
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<&dmac1 0xc1>, <&dmac1 0xc2>;
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dma-names = "tx", "rx", "tx", "rx";
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max-frequency = <97500000>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 312>;
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};
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sdhi3: sd@ee160000 {
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compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
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reg = <0 0xee160000 0 0x100>;
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interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 311>;
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dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
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<&dmac1 0xd3>, <&dmac1 0xd4>;
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dma-names = "tx", "rx", "tx", "rx";
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max-frequency = <97500000>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 311>;
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};
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