51 lines
1.8 KiB
Plaintext
Executable file
51 lines
1.8 KiB
Plaintext
Executable file
* Serial NOR flash controller for MediaTek SoCs
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Required properties:
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- compatible: For mt8173, compatible should be "mediatek,mt8173-nor",
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and it's the fallback compatible for other Soc.
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For every other SoC, should contain both the SoC-specific compatible
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string and "mediatek,mt8173-nor".
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The possible values are:
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"mediatek,mt2701-nor", "mediatek,mt8173-nor"
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"mediatek,mt2712-nor", "mediatek,mt8173-nor"
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"mediatek,mt7622-nor", "mediatek,mt8173-nor"
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"mediatek,mt7623-nor", "mediatek,mt8173-nor"
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"mediatek,mt7629-nor", "mediatek,mt8173-nor"
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"mediatek,mt8173-nor"
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- reg: physical base address and length of the controller's register
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- clocks: the phandle of the clocks needed by the nor controller
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- clock-names: the names of the clocks
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the clocks should be named "spi" and "sf". "spi" is used for spi bus,
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and "sf" is used for controller, these are the clocks witch
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hardware needs to enabling nor flash and nor flash controller.
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See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
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- #address-cells: should be <1>
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- #size-cells: should be <0>
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The SPI flash must be a child of the nor_flash node and must have a
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compatible property. Also see jedec,spi-nor.txt.
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Required properties:
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- compatible: May include a device-specific string consisting of the manufacturer
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and name of the chip. Must also include "jedec,spi-nor" for any
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SPI NOR flash that can be identified by the JEDEC READ ID opcode (0x9F).
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- reg : Chip-Select number
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Example:
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nor_flash: spi@1100d000 {
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compatible = "mediatek,mt8173-nor";
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reg = <0 0x1100d000 0 0xe0>;
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clocks = <&pericfg CLK_PERI_SPI>,
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<&topckgen CLK_TOP_SPINFI_IFR_SEL>;
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clock-names = "spi", "sf";
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#address-cells = <1>;
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#size-cells = <0>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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};
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};
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