136 lines
4.7 KiB
Plaintext
Executable file
136 lines
4.7 KiB
Plaintext
Executable file
Faraday Technology FTPCI100 PCI Host Bridge
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This PCI bridge is found inside that Cortina Systems Gemini SoC platform and
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is a generic IP block from Faraday Technology. It exists in two variants:
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plain and dual PCI. The plain version embeds a cascading interrupt controller
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into the host bridge. The dual version routes the interrupts to the host
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chips interrupt controller.
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The host controller appear on the PCI bus with vendor ID 0x159b (Faraday
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Technology) and product ID 0x4321.
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Mandatory properties:
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- compatible: ranging from specific to generic, should be one of
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"cortina,gemini-pci", "faraday,ftpci100"
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"cortina,gemini-pci-dual", "faraday,ftpci100-dual"
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"faraday,ftpci100"
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"faraday,ftpci100-dual"
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- reg: memory base and size for the host bridge
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- #address-cells: set to <3>
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- #size-cells: set to <2>
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- #interrupt-cells: set to <1>
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- bus-range: set to <0x00 0xff>
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- device_type, set to "pci"
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- ranges: see pci.txt
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- interrupt-map-mask: see pci.txt
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- interrupt-map: see pci.txt
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- dma-ranges: three ranges for the inbound memory region. The ranges must
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be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB, 64MB,
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128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked as
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pre-fetchable.
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Optional properties:
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- clocks: when present, this should contain the peripheral clock (PCLK) and the
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PCI clock (PCICLK). If these are not present, they are assumed to be
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hard-wired enabled and always on. The PCI clock will be 33 or 66 MHz.
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- clock-names: when present, this should contain "PCLK" for the peripheral
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clock and "PCICLK" for the PCI-side clock.
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Mandatory subnodes:
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- For "faraday,ftpci100" a node representing the interrupt-controller inside the
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host bridge is mandatory. It has the following mandatory properties:
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- interrupt: see interrupt-controller/interrupts.txt
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- interrupt-controller: see interrupt-controller/interrupts.txt
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- #address-cells: set to <0>
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- #interrupt-cells: set to <1>
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I/O space considerations:
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The plain variant has 128MiB of non-prefetchable memory space, whereas the
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"dual" variant has 64MiB. Take this into account when describing the ranges.
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Interrupt map considerations:
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The "dual" variant will get INT A, B, C, D from the system interrupt controller
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and should point to respective interrupt in that controller in its
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interrupt-map.
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The code which is the only documentation of how the Faraday PCI (the non-dual
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variant) interrupts assigns the default interrupt mapping/swizzling has
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typically been like this, doing the swizzling on the interrupt controller side
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rather than in the interconnect:
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map =
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<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
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<0x4800 0 0 2 &pci_intc 1>,
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<0x4800 0 0 3 &pci_intc 2>,
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<0x4800 0 0 4 &pci_intc 3>,
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<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
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<0x5000 0 0 2 &pci_intc 2>,
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<0x5000 0 0 3 &pci_intc 3>,
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<0x5000 0 0 4 &pci_intc 0>,
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<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
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<0x5800 0 0 2 &pci_intc 3>,
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<0x5800 0 0 3 &pci_intc 0>,
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<0x5800 0 0 4 &pci_intc 1>,
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<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
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<0x6000 0 0 2 &pci_intc 0>,
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<0x6000 0 0 3 &pci_intc 1>,
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<0x6000 0 0 4 &pci_intc 2>;
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Example:
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pci@50000000 {
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compatible = "cortina,gemini-pci", "faraday,ftpci100";
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reg = <0x50000000 0x100>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, /* PCI A */
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<26 IRQ_TYPE_LEVEL_HIGH>, /* PCI B */
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<27 IRQ_TYPE_LEVEL_HIGH>, /* PCI C */
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<28 IRQ_TYPE_LEVEL_HIGH>; /* PCI D */
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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bus-range = <0x00 0xff>;
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ranges = /* 1MiB I/O space 0x50000000-0x500fffff */
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<0x01000000 0 0 0x50000000 0 0x00100000>,
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/* 128MiB non-prefetchable memory 0x58000000-0x5fffffff */
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<0x02000000 0 0x58000000 0x58000000 0 0x08000000>;
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/* DMA ranges */
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dma-ranges =
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/* 128MiB at 0x00000000-0x07ffffff */
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<0x02000000 0 0x00000000 0x00000000 0 0x08000000>,
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/* 64MiB at 0x00000000-0x03ffffff */
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<0x02000000 0 0x00000000 0x00000000 0 0x04000000>,
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/* 64MiB at 0x00000000-0x03ffffff */
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<0x02000000 0 0x00000000 0x00000000 0 0x04000000>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map =
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<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
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<0x4800 0 0 2 &pci_intc 1>,
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<0x4800 0 0 3 &pci_intc 2>,
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<0x4800 0 0 4 &pci_intc 3>,
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<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
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<0x5000 0 0 2 &pci_intc 2>,
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<0x5000 0 0 3 &pci_intc 3>,
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<0x5000 0 0 4 &pci_intc 0>,
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<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
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<0x5800 0 0 2 &pci_intc 3>,
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<0x5800 0 0 3 &pci_intc 0>,
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<0x5800 0 0 4 &pci_intc 1>,
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<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
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<0x6000 0 0 2 &pci_intc 0>,
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<0x6000 0 0 3 &pci_intc 0>,
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<0x6000 0 0 4 &pci_intc 0>;
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pci_intc: interrupt-controller {
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interrupt-parent = <&intcon>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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};
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};
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