249 lines
7.2 KiB
Plaintext
Executable file
249 lines
7.2 KiB
Plaintext
Executable file
*** NOTE ***
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This document is copied from OPAL firmware
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(skiboot/doc/device-tree/ibm,powerpc-cpu-features/binding.txt)
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There is more complete overview and documentation of features in that
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source tree. All patches and modifications should go there.
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************
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ibm,powerpc-cpu-features binding
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================================
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This device tree binding describes CPU features available to software, with
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enablement, privilege, and compatibility metadata.
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More general description of design and implementation of this binding is
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found in design.txt, which also points to documentation of specific features.
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/cpus/ibm,powerpc-cpu-features node binding
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-------------------------------------------
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Node: ibm,powerpc-cpu-features
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Description: Container of CPU feature nodes.
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The node name must be "ibm,powerpc-cpu-features".
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It is implemented as a child of the node "/cpus", but this must not be
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assumed by parsers.
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The node is optional but should be provided by new OPAL firmware.
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Properties:
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- compatible
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Usage: required
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Value type: string
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Definition: "ibm,powerpc-cpu-features"
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This compatibility refers to backwards compatibility of the overall
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design with parsers that behave according to these guidelines. This can
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be extended in a backward compatible manner which would not warrant a
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revision of the compatible property.
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- isa
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Usage: required
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Value type: <u32>
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Definition:
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isa that the CPU is currently running in. This provides instruction set
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compatibility, less the individual feature nodes. For example, an ISA v3.0
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implementation that lacks the "transactional-memory" cpufeature node
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should not use transactional memory facilities.
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Value corresponds to the "Power ISA Version" multiplied by 1000.
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For example, <3000> corresponds to Version 3.0, <2070> to Version 2.07.
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The minor digit is available for revisions.
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- display-name
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Usage: optional
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Value type: string
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Definition:
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A human readable name for the CPU.
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/cpus/ibm,powerpc-cpu-features/example-feature node bindings
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----------------------------------------------------------------
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Each child node of cpu-features represents a CPU feature / capability.
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Node: A string describing an architected CPU feature, e.g., "floating-point".
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Description: A feature or capability supported by the CPUs.
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The name of the node is a human readable string that forms the interface
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used to describe features to software. Features are currently documented
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in the code where they are implemented in skiboot/core/cpufeatures.c
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Presence of the node indicates the feature is available.
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Properties:
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- isa
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Usage: required
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Value type: <u32>
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Definition:
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First level of the Power ISA that the feature appears in.
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Software should filter out features when constraining the
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environment to a particular ISA version.
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Value is defined similarly to /cpus/features/isa
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- usable-privilege
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Usage: required
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Value type: <u32> bit mask
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Definition:
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Bit numbers are LSB0
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bit 0 - PR (problem state / user mode)
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bit 1 - OS (privileged state)
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bit 2 - HV (hypervisor state)
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All other bits reserved and should be zero.
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This property describes the privilege levels and/or software components
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that can use the feature.
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If bit 0 is set, then the hwcap-bit-nr property will exist.
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- hv-support
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Usage: optional
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Value type: <u32> bit mask
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Definition:
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Bit numbers are LSB0
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bit 0 - HFSCR
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All other bits reserved and should be zero.
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This property describes the HV privilege support required to enable the
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feature to lesser privilege levels. If the property does not exist then no
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support is required.
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If no bits are set, the hypervisor must have explicit/custom support for
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this feature.
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If the HFSCR bit is set, then the hfscr-bit-nr property will exist and
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the feature may be enabled by setting this bit in the HFSCR register.
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- os-support
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Usage: optional
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Value type: <u32> bit mask
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Definition:
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Bit numbers are LSB0
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bit 0 - FSCR
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All other bits reserved and should be zero.
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This property describes the OS privilege support required to enable the
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feature to lesser privilege levels. If the property does not exist then no
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support is required.
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If no bits are set, the operating system must have explicit/custom support
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for this feature.
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If the FSCR bit is set, then the fscr-bit-nr property will exist and
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the feature may be enabled by setting this bit in the FSCR register.
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- hfscr-bit-nr
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Usage: optional
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Value type: <u32>
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Definition: HFSCR bit position (LSB0)
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This property exists when the hv-support property HFSCR bit is set. This
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property describes the bit number in the HFSCR register that the
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hypervisor must set in order to enable this feature.
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This property also exists if an HFSCR bit corresponds with this feature.
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This makes CPU feature parsing slightly simpler.
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- fscr-bit-nr
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Usage: optional
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Value type: <u32>
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Definition: FSCR bit position (LSB0)
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This property exists when the os-support property FSCR bit is set. This
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property describes the bit number in the FSCR register that the
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operating system must set in order to enable this feature.
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This property also exists if an FSCR bit corresponds with this feature.
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This makes CPU feature parsing slightly simpler.
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- hwcap-bit-nr
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Usage: optional
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Value type: <u32>
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Definition: Linux ELF AUX vector bit position (LSB0)
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This property may exist when the usable-privilege property value has PR bit set.
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This property describes the bit number that should be set in the ELF AUX
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hardware capability vectors in order to advertise this feature to userspace.
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Bits 0-31 correspond to bits 0-31 in AT_HWCAP vector. Bits 32-63 correspond
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to 0-31 in AT_HWCAP2 vector, and so on. Missing AT_HWCAPx vectors implies
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that the feature is not enabled or can not be advertised. Operating systems
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may provide a number of unassigned hardware capability bits to allow for new
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features to be advertised.
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Some properties representing features created before this binding are
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advertised to userspace without a one-to-one hwcap bit number may not specify
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this bit. Operating system will handle those bits specifically. All new
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features usable by userspace will have a hwcap-bit-nr property.
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- dependencies
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Usage: optional
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Value type: <prop-encoded-array>
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Definition:
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If this property exists then it is a list of phandles to cpu feature
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nodes that must be enabled for this feature to be enabled.
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Example
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-------
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/cpus/ibm,powerpc-cpu-features {
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compatible = "ibm,powerpc-cpu-features";
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isa = <3020>;
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darn {
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isa = <3000>;
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usable-privilege = <1 | 2 | 4>;
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hwcap-bit-nr = <xx>;
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};
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scv {
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isa = <3000>;
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usable-privilege = <1 | 2>;
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os-support = <0>;
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hwcap-bit-nr = <xx>;
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};
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stop {
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isa = <3000>;
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usable-privilege = <2 | 4>;
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hv-support = <0>;
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os-support = <0>;
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};
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vsx2 (hypothetical) {
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isa = <3010>;
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usable-privilege = <1 | 2 | 4>;
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hv-support = <0>;
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os-support = <0>;
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hwcap-bit-nr = <xx>;
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};
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vsx2-newinsns {
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isa = <3020>;
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usable-privilege = <1 | 2 | 4>;
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os-support = <1>;
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fscr-bit-nr = <xx>;
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hwcap-bit-nr = <xx>;
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dependencies = <&vsx2>;
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};
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};
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